Demo Data from VLDB 2026 / reviewers in the wild / expert
Paul W. Baker
dblp:45/333
· DBLP profile ↗
7ranked-venue papers
4as first author
0since 2021 · last 1986
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 4 first-authorDatabases, data management, data science and information retrieval · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
4 papers |
Mathematical optimization · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
5 papers |
Processor architecture and microarchitecture · 100% | |
| Computer graphics and multimedia
1 paper |
Rendering · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Mathematical optimization
numerical computation |
0.0 | 4 | 1979 | The Solution of Differential Equations on Short-Word-Length Computing Devices · IEEE Trans. Computers 1979 Suggestion for a Fast Binary Sine/Cosine Generator · IEEE Trans. Computers 1976 Parallel Multiplicative Algorithms for Some Elementary Functions · IEEE Trans. Computers 1975 |
Processor architecture and microarchitecture › special-purpose processor
digital differential analyzer |
0.0 | 3 | 1979 | The Solution of Differential Equations on Short-Word-Length Computing Devices · IEEE Trans. Computers 1979 Comments on "A Floating Point Multiplexed DDA System" · IEEE Trans. Computers 1978 On Digital Differential Analyzer (DDA) Circle Generation for Computer Graphics · IEEE Trans. Computers 1975 |
Mathematical optimization › numerical computation
elementary function evaluation |
0.0 | 3 | 1976 | Suggestion for a Fast Binary Sine/Cosine Generator · IEEE Trans. Computers 1976 Parallel Multiplicative Algorithms for Some Elementary Functions · IEEE Trans. Computers 1975 More Efficient Radix-2 Algorithms for Some Elementary Functions · IEEE Trans. Computers 1975 |
Processor architecture and microarchitecture
arithmetic unit |
0.0 | 2 | 1976 | Suggestion for a Fast Binary Sine/Cosine Generator · IEEE Trans. Computers 1976 Parallel Multiplicative Algorithms for Some Elementary Functions · IEEE Trans. Computers 1975 |
Rendering
rasterization |
0.0 | 1 | 1975 | On Digital Differential Analyzer (DDA) Circle Generation for Computer Graphics · IEEE Trans. Computers 1975 |
Processor architecture and microarchitecture › computer arithmetic
floating-point arithmetic |
0.0 | 1 | 1978 | Comments on "A Floating Point Multiplexed DDA System" · IEEE Trans. Computers 1978 |
Methods — techniques the papers use, named apart from their topics
single-phase adam's procedure · 0.0residue retention · 0.0prestored constant table · 0.0parallel multiplier · 0.0nth order truncation error suppression · 0.0continued product algorithm · 0.0combinational two-dimensional array · 0.0DDA circle generation · 0.0ternary digit selection · 0.0shift-and-add · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1986 | A Class of Differential Equations for Testing Variable Step-Size Integration
Max B. Webster, Paul W. Baker |
Inf. Process. Lett. | 2 |
| 1979 | The Solution of Differential Equations on Short-Word-Length Computing DevicesabstractWhen the numerical solution of differential equations (DE's) for dynamical simulation is performed with short-word-length computing devices, it is essential that truncation (round-off) error be understood and controlled where possible. This paper presents a simple but enlightening analysis of truncation errors in the computer solution of DE's, an analysis which develops the rationale for the residue register, the distinguishing feature of the digital differential analyzer (DDA), for the suppression of (second-order) truncation error. The analysis is extended formally to complete the theory of nth order truncation error suppression in linear DE's. After discussing the application of residue retention techniques to higher order integration formulas, the utility of third-order truncation error suppression strategy is illustrated in the suppression of "limit cycle" oscillations that occur in marginally damped oscillatory systems. The use of residue retention is then shown to be more critical in the case of DE's with multiplicative nonlinearities. Finally, design strategies are discussed briefly. Paul W. Baker |
IEEE Trans. Computers | 1 |
| 1978 | Comments on "A Floating Point Multiplexed DDA System"abstractIn a recent paper, Hannington and Whitehead1describe the design of a floating point digital differential analyzer (DDA). There are, however, shortcomings in the design which we will describe in this correspondence. Philip G. McCrea, Peter C. Maxwell, Paul W. Baker |
IEEE Trans. Computers | 3 |
| 1976 | Suggestion for a Fast Binary Sine/Cosine GeneratorabstractA combinational two-dimensional array for the rapid generation of sines and cosines is described. The array is a spatial realization of a continued product algorithm which uses multiplication by (1 + jEk2-k). Using 10-ns logic, it is estimated that 16-bit sines and cosines may be generated in less than 2 μs. Paul W. Baker |
IEEE Trans. Computers | 1 |
| 1975 | More Efficient Radix-2 Algorithms for Some Elementary Functionsabstractde Lugish [1] has defined efficient algorithms in radix 2 for certain elementary functions such as Y[X,Y/X1/2, Y + lnX, Y.exp (X), etc. His technique requires a systematic 1-bit left shift of a partially converged result, together with two 4-bit comparisons to select a ternary digit for the next iteration. This selection of digits reduces the average number of full precision additions to about 1/3 of those required in conventional schemes [3]. This paper develops modified algorithms in radix 2 which are more efficient when the time for a full precision addition is comparable to the time for a shift and comparison. The modified procedure is developed for Y/X in detail where more than a 40 percent decrease in execution time is achieved for only a marginal increase in cost. Paul W. Baker |
IEEE Trans. Computers | 1 |
| 1975 | Parallel Multiplicative Algorithms for Some Elementary FunctionsabstractThis correspondence presents generalized higher radix algorithms for some elementary functions which use fast parallel m-bit multipliers where radix = 2m. These algorithms are extensions of those iterative schemes which are based on multiplications by (1 + 2-i) and the use of prestored values of ln (1 + 2-i) and tan-1(2-i). The particular functions under consideration are y/x, y/x1/2, y. exp (x), y + 1n (x), sin (x) and cos (x) [and hence tan (x)]. The extended algorithms rely on multiplication by (1 + dir-k) where di, 0 ≤ dir, is an m-bit integer. Using a simple selection procedure for di, simulations show that p(radix r) digits of a function may be generated, on the average, in less than p + 1 iterations. Paul W. Baker |
IEEE Trans. Computers | 1 |
| 1975 | On Digital Differential Analyzer (DDA) Circle Generation for Computer GraphicsabstractThis correspondence comments on the method of circle generation described by Armstrong [1], and discusses the methods by which satisfactory circles for computer graphics may be obtained with digital differential analyzers (DDA's) using a single-phase Adam's procedure. P. G. McGrea, Paul W. Baker |
IEEE Trans. Computers | 2 |