Demo Data from VLDB 2026 / reviewers in the wild / expert
Cheng Chou
dblp:45/8314
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Interconnection networks and networks-on-chip · 56% Embedded and real-time systems · 44% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › arbitration
arbiter design |
0.1 | 1 | 2010 | New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model · DAC 2010 |
Embedded and real-time systems
model-based design |
0.1 | 1 | 2010 | New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model · DAC 2010 |
Interconnection networks and networks-on-chip › switch architecture
crossbar switch |
0.0 | 1 | 2010 | New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model · DAC 2010 |
Methods — techniques the papers use, named apart from their topics
template-based modular design · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture modelabstractDesigning of arbiters has become increasingly important because of their wide use in such as multi-processor system-on-a-chips (MPSoCs) and on- or off- chip high-speed cross-bar switches and networks. In this and an accompanying paper [6], we proposed a new systematic model-driven flow for design of the proposed new scalable multi-facet arbiters through a 3-phase process combined with the template-based modular design approach: the design model derivation phase, the architecture model (or template) design phase as well as arbiter hardware implementation and generation phase. Here, we described the phase 1 of the design flow of how to induce an arbiter design model in detail by careful analysis of arbiter design issues and systematic design space exploring the construction of the model. Then, we continue to discuss the phase 2 of how to derive an architecture model or template using the reusability, modularity and expansibility techniques. With both the design and architecture models, designers can easily design or at least understand and thus choose many kinds of different but better arbiters efficiently. The phase 3 is described in the accompanying paper [6]. To our knowledge, this is the first time that such a systematic model-driven design approach is proposed for the practical hardware design. Jer-Min Jou, Sih-Sian Wu, Yun-Lung Lee, Cheng Chou, Yuan-Long Jeang |
DAC | 4 |