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Michael Behar

dblp:46/3176 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2019
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 44% Memory systems · 44% Energy-efficient computing · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › cache management
cache replacement
0.112007
Trace cache sampling filter · ACM Trans. Comput. Syst. 2007
Processor architecture and microarchitecture › instruction fetch
trace cache
0.112007
Trace cache sampling filter · ACM Trans. Comput. Syst. 2007

Methods — techniques the papers use, named apart from their topics

random sampling · 0.1hot/cold trace principle · 0.1
YearPublicationVenuePosition
2019 Spring Hill (NNP-I 1000) Intel's Data Center Inference Chip
abstract
This article consists of a collection of slides from the author's conference presentation.
Ofri Wechsler, Michael Behar, Bharat Daga
Hot Chips Symposium2
2007 Trace cache sampling filter
abstract
A simple mechanism to increase the utilization of a small trace cache, and simultaneously reduce its power consumption, is presented in this article. The mechanism uses selective storage of traces (filtering) that is based on a new concept in computer architecture: random sampling. The sampling filter exploits the “hot/cold trace” principle, which divides the population of traces into two groups. The first group contains “hot traces” that are executed many times from the trace cache and contribute the majority of committed instructions. The second group contains “cold traces” that are rarely executed, but are responsible for the majority of writes to an unfiltered cache. The sampling filter selects traces without any prior knowledge of their quality. However, as most writes to the cache are of “cold traces” it statistically filters out those traces, reducing cache turnover and eventually leading to higher quality traces residing in the cache. In contrast with previously proposed filters, which perform bookkeeping for all traces in the program, the sampling filter can be implemented with minimal hardware. Results show that the sampling filter can increase the number of hits per build (utilization) by a factor of 38, reduce the miss rate by 20% and improve the performance-power efficiency by 15%. Further improvements can be obtained by extensions to the basic sampling filter: allowing “hot traces” to bypass the sampling filter, combining of sampling together with previously proposed filters, and changing the replacement policy in the trace cache. Those techniques combined with the sampling filter can reduce the miss rate of the trace cache by up to 40%. Although the effectiveness of the sampling filter is demonstrated for a trace cache, the sampling principle is applicable to other micro-architectural structures with similar access patterns.
Michael Behar, Avi Mendelson, Avinoam Kolodny
ACM Trans. Comput. Syst.1