Demo Data from VLDB 2026 / reviewers in the wild / expert
Jean-Michel Ayache
dblp:46/4073
· DBLP profile ↗
5ranked-venue papers
3as first author
0since 2021 · last 1988
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-authorSoftware engineering, systems software and programming languages · 2 · 1 first-authorComputer networks · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Hardware reliability and fault tolerance · 35% Embedded and real-time systems · 34% Distributed systems · 25% | |
| Software engineering, system software, and programming languages
1 paper |
Program verification · 100% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Distributed systems
fault tolerance |
0.0 | 2 | 1982 | Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines · IEEE Trans. Computers 1979 REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control · IEEE Trans. Computers 1982 |
Embedded and real-time systems
real-time control |
0.0 | 1 | 1982 | REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control · IEEE Trans. Computers 1982 |
Hardware reliability and fault tolerance › functional safety
fail-safe systems |
0.0 | 1 | 1979 | Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines · IEEE Trans. Computers 1979 |
Hardware reliability and fault tolerance
self-checking circuits |
0.0 | 1 | 1979 | Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines · IEEE Trans. Computers 1979 |
Program verification
protocol verification |
0.0 | 1 | 1978 | Design and Verification of Communication Procedures: A Bottom-Up Approach · ICSE 1978 |
Embedded and real-time systems › industrial control systems
real-time industrial control |
0.0 | 1 | 1982 | REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control · IEEE Trans. Computers 1982 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1979 | Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines · IEEE Trans. Computers 1979 |
Methods — techniques the papers use, named apart from their topics
serial bus communication · 0.0distributed system design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1988 | EWS - An Integrated Workstation for the Design and the Automatic Generation of Distributed Software
Jean-Michel Ayache, Jean Dufau, Michel Huybrechts, Eric Mattera |
FORTE | 1 |
| 1982 | Self-Checking software in distributed systems
Jean-Michel Ayache, Jean-Pierre Courtiat, Michel Diaz |
ICDCS | 1 |
| 1982 | REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time ControlabstractThis paper presents a fault-tolerant distributed system designed for real-time control applications (REBUS), which is one of the research basis of the industrial real-time system MODUMAT 800. It is made up of functional units, i.e., programmable multiloop regulators and operator displays, linked together by a communication structure. The communication hardware consists of a set of serial bus interface boards, one per functional unit, loosely coupled together by a double serial bus and linked to their functional units by a private parallel bus. Jean-Michel Ayache, Jean-Pierre Courtiat, Michel Diaz |
IEEE Trans. Computers | 1 |
| 1979 | Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential MachinesabstractThis correspondence deals with a unification and extension of some previous work on self-checking (SC) and fail-safe (FS) systems. Michel Diaz, Pierre Azéma, Jean-Michel Ayache |
IEEE Trans. Computers | 3 |
| 1978 | Design and Verification of Communication Procedures: A Bottom-Up Approach
Pierre Azéma, Jean-Michel Ayache, Bernard Berthomieu |
ICSE | 2 |