Demo Data from VLDB 2026 / reviewers in the wild / expert
Walter E. Baker
dblp:46/648
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 46% Processor architecture and microarchitecture · 46% Memory systems · 7% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation › workload characterization › commercial workloads
OLTP workload characterization |
0.0 | 1 | 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads · ISCA 1998 |
Processor architecture and microarchitecture
out-of-order execution |
0.0 | 1 | 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads · ISCA 1998 |
Processor architecture and microarchitecture
superscalar processor |
0.0 | 1 | 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads · ISCA 1998 |
Performance modeling and evaluation
workload characterization |
0.0 | 1 | 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads · ISCA 1998 |
Memory systems
cache |
0.0 | 1 | 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads · ISCA 1998 |
Methods — techniques the papers use, named apart from their topics
hardware counters · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1998 | Performance Characterization of a Quad Pentium Pro SMP using OLTP WorkloadsabstractCommercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these differences is that computers optimized for technical workloads may not provide good performance for commercial applications, and these applications may not fully exploit advances in processor design. To evaluate these issues, we use hardware counters to measure architectural features of a four-processor Pentium Pro-based server running a TPC-C-like workload on an Informix database. We examine the effectiveness of out-of-order execution, branch prediction, speculative execution, superscalar issue and retire, caching and multiprocessor scaling. We find that out-of-order execution, superscalar issue and retire, and branch prediction are not as effective for database workloads as they are for technical workloads, such as SPEC. We find that caches are effective at reducing processor traffic to memory; even larger caches would be helpful to satisfy more data requests. Multiprocessor scaling of this workload is good, but even modest bus utilization degrades application memory latency, limiting database throughput. Kimberly Keeton, David A. Patterson 0001, Yong Qiang He, Roger C. Raphael, Walter E. Baker |
ISCA | 5 |