Ryan Afonso

dblp:47/10064 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.112011
Power reduction via separate synthesis and physical libraries · DAC 2011
Electronic design automation › circuit sizing
cell sizing
0.012011
Power reduction via separate synthesis and physical libraries · DAC 2011
Electronic design automation
physical design
0.012011
Power reduction via separate synthesis and physical libraries · DAC 2011

Methods — techniques the papers use, named apart from their topics

dual library approach · 0.1
YearPublicationVenuePosition
2011 Power reduction via separate synthesis and physical libraries
abstract
We introduce the concept of utilizing two cell libraries, one for synthesis and another for physical design. The physical library consists of only 9 functions, each with several drive and beta ratio options, for a total cell count of 186. We show that synthesis performs better with the inclusion of more complex cells (but only if they are power efficient), we augment the synthesis library to include numerous combinations of the basic 9 functions. The resulting synthesis library consists of a total of 865 cells. Note that these compound cells require only characterization (for a set of drive strengths, but only one beta ratio) and no layout. After design synthesis the compound cells are decomposed back to the basic (9) cells in the physical library. Then cell-size optimization is performed. The entire flow is efficient, with an ability to handle multi-million-gate commercial designs. Applied after state-of-the-art commercial synthesis, the application of a discrete cell-size selection tool, combined with the new dual library approach, results in a typical active area reduction of 40% for large current industrial designs, for the same delay.
Ryan Afonso, Hiran Tennakoon, Carl Sechen
DAC2