Many existing transport designs aim to deliver ultra-low latency and high bandwidth for applications in high-speed datacenter networks. However, almost all of them intertwine the control of small and large flows using the same control entity (e.g., sender or receiver) and congestion feedback signal (e.g., ECN or credit), thus bringing significant performance impairments. By contrast, we seek to decouple the rate control of small flows from that of large ones.

Acoustic scattering is strongly influenced by boundary geometry of objects over which sound scatters. The present work proposes a method to infer object geometry from scattering features by training convolutional neural networks. The training data is generated from a fast numerical solver developed on CUDA. The complete set of simulations is sampled to generate multiple datasets containing different amounts of channels and diverse image resolutions. The robustness of our approach in response to data degradation is evaluated by comparing the performance of networks trained using the datasets with varying levels of data degradation. The present work has found that the predictions made from our models match ground truth with high accuracy. In addition, accuracy does not degrade when fewer data channels or lower resolutions are used.

Diffracted scattering and occlusion are important acoustic effects in interactive auralization and noise control applications, typically requiring expensive numerical simulation. We propose training a convolutional neural network to map from a convex scatterer's cross-section to a 2D slice of the resulting spatial loudness distribution. We show that employing a full-resolution residual network for the resulting image-to-image regression problem yields spatially detailed loudness fields with a root-mean-squared error of less than 1 dB, at over 100x speedup compared to full wave simulation.

Meeting latency SLOs (Service Level Objectives) in a networked storage environment is essential while challenging. In this environment, a storage request has to go through client I/O stacks, dynamically changing networks, and the storage system attached to a server. Its response also has to traverse all the way back to the client. Along this long I/O path, any of these components can become congested. The behavior of one component may affect the performance of the others. Isolated control on each component is not effective to meet latency SLOs of storage requests. In this paper, we propose and implement JoiNS, a system trying to guarantee latency SLO for applications that access data on a remote networked storage. JoiNS carefully considers all the components along the I/O path and controls them in a coordinated fashion. JoiNS has both global network and storage visibilities with a logically centralized controller which keeps monitoring the status of each involved component. JoiNS coordinates these components and adjusts the priority of I/O packets in each component based on the latency SLO, network and storage status, time estimation, and characteristics of each I/O request. We integrate Software Defined Network(SDN) into our system to coordinate with storage. Our evaluation shows JoiNS can achieve up to 6X speedup in this networked storage environment with various loads of background traffic.

Shingled Magnetic Recording (SMR) drives can benefit large-scale storage systems by reducing the Total Cost of Ownership (TCO) of dealing with explosive data growth. Among all existing SMR models, Host Aware SMR (HA-SMR) looks the most promising for its backward compatibility with legacy I/O stacks and its ability to use new SMR-specific APIs to support host I/O stack optimization. Building storage systems using HA-SMR drives calls for a deep understanding of the drive's performance characteristics. To accomplish this, we conduct in-depth performance evaluations on HA-SMR drives with a special emphasis on the performance implications of the SMR-specific APIs and how these drives can be deployed in large storage systems. We discover both favorable and adverse effects of using HA-SMR drives under various workloads. We also investigate the drive's performance under legacy production environments using real-world enterprise traces. Finally, we propose a novel host-controlled buffer that can help to reduce the severity of the decline in HA-SMR performance under our discovered unfavorable I/O access patterns. Without a detailed comprehensive design, we show the potential of the host-controlled buffer by a case study.

Most computer systems currently consist of DRAM as main memory and hard disk drives (HDDs) as storage devices. Due to the volatile nature of DRAM, the main memory may suffer from data loss in the event of power failures or system crashes. With rapid development of new types of non-volatile memory (NVRAM), such as PCM, Memristor, and STT-RAM, it becomes likely that one of these technologies will replace DRAM as main memory in the not-too-distant future. In an NVRAM based buffer cache, any updated pages can be kept longer without the urgency to be flushed to HDDs. This opens opportunities for designing new buffer cache policies that can achieve better storage performance. However, it is challenging to design a policy that can also increase the cache hit ratio. In this paper, we propose a buffer cache policy, named I/O-Cache, that regroups and synchronizes long sets of consecutive dirty pages to take advantage of HDDs' fast sequential access speed and the non-volatile property of NVRAM. In addition, our new policy can dynamically separate the whole cache into a dirty cache and a clean cache, according to the characteristics of the workload, to decrease storage writes. We evaluate our scheme with various traces. The experimental results show that I/O-Cache shortens I/O completion time, decreases the number of I/O requests, and improves the cache hit ratio compared with existing cache policies.

With the rapid development of new types of nonvolatile memory (NVM), one of these technologies may replace DRAM as the main memory in the near future. Some drawbacks of DRAM, such as data loss due to power failure or a system crash can be remedied by NVM's non-volatile nature. In the meantime, solid state drives (SSDs) are becoming widely deployed as storage devices for faster random access speed compared with traditional hard disk drives (HDDs). For applications demanding higher reliability and better performance, using NVM as the main memory and SSDs as storage devices becomes a promising architecture. Although SSDs have better performance than HDDs, SSDs cannot support in-place updates (i.e., an erase operation has to be performed before a page can be updated) and suffer from a low endurance problem that each unit will wear out after certain number of erase operations. In an NVM based main memory, any updated pages called dirty pages can be kept longer without the urgent need to be flushed to SSDs. This difference opens an opportunity to design new cache policies that help extend the lifespan of SSDs by wisely choosing cache eviction victims to decrease storage write traffic. However, it is very challenging to design a policy that can also increase the cache hit ratio for better system performance. Most existing DRAM-based cache policies have mainly concentrated on the recency or frequency status of a page. On the other hand, most existing NVM-based cache policies have mainly focused on the dirty or clean status of a page. In this paper, by extending the concept of the Adaptive Replacement Cache (ARC), we propose a Hierarchical Adaptive Replacement Cache (H-ARC) policy that considers all four factors of a page's status: dirty, clean, recency, and frequency. Specifically, at the higher level, H-ARC adaptively splits the whole cache space into a dirty-page cache and a clean-page cache. At the lower level, inside the dirty-page cache and the clean-page cache, H-ARC splits them into a recency-page cache and a frequency-page cache separately. During the page eviction process, all parts of the cache will be balanced towards to their desired sizes.

Location information of nodes is the basis for many applications in wireless sensor networks (WSNs). However, most previous localization methods make the unrealistic assumptions: (i) all nodes in WSN are always awake and (ii) the radio range of nodes is an ideal circle. This overlooks the common scenario that sensor nodes are duty-cycled in order to save energy and the radio range of nodes is irregular. In this paper we revisit the Distance-Vector-based (DV-based) positioning algorithms, particularly, Hop-Count-Ratio based Localization (HCRL) algorithm and investigate the following problems: (i) how is the relationship between the number of sleeping neighbor sensor nodes and the localization accuracy and (ii) how is the relationship between the degree of irregularity (DOI, which is a parameter of radio range irregularity) and the localization accuracy. We conduct a large number of experiments in WSNs' simulator NetTopo, and find that the parameters: the number of waking nodes, DOI, anchor node density and localization error, are interactional, i.e., for a given deployed static WSN, there is an optimal number of waking nodes and an optimal anchor node density, which can minimize network energy consumption without losing much of the localization accuracy. Furthermore, waking up more sensor nodes cannot always help to increase the localization accuracy, which actually is different from our intuitive thinking: more waking nodes can help to increase the localization accuracy of DV-based localization algorithms at all time.

In Wireless Sensor Networks (WSNs) a multitude of location-dependent applications have been proposed recently, which is very intriguing for researchers to discover and design more accurate and cost-effective localization algorithms. In an isotropic networks, the Euclidean distance between a pair of nodes may not correlate closely with the hop count between them because the corresponding shortest path may have to curve around intermediate holes, resulting in poor distance estimation. And without the help of a large number of uniformly deployed seed nodes, those schemes fail in an isotropic WSNs. To address this issue and improve the accuracy of localization, we propose the Removing Heavily Curved Path (RHCP) scheme in this paper. RHCP takes advantage of selecting the paths which are not heavily affected by the holes to recalculate the location of each unknown node. Through simulation, the results reveal that RHCP performs better than original DV-Hop in an isotropic networks with different shape of holes. In addition, through iterations of RHCP, the results get improved for different anchor node densities.

One of the most frequently concerned metrics for evaluating the performance of MAC protocol is throughput. In this paper, we propose a novel Markov Chain based TDMA MAC protocol which is called Predictive-TDMA (P-TDMA) to achieve high performance of throughput for Mesh Networks. In order to give a more effective time slot assignment strategy rather than even assignment, we use Markov Chain to predict the possibility of an end-user device's future working condition, whether it's more likely to be idle or busy. Then based on the ratio of all end-user devices' possibilities of working condition, we assign a proper number of time slots to each end-user device to maximize throughput. Through simulation, the results show that under the scenario that the amount of data is randomly requested by each end-user device, throughput of our design is around 10% better than even assignment strategy. And under the scenario that some end-user devices request much more amount of data than others, which happens more frequently in realistic situations, throughput of our design can be 200% better than even assignment strategy.