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Leslie Kohn

dblp:47/1939 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 57% Performance modeling and evaluation · 30% Integrated circuit design · 13%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
simulation		 0.011995
A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I · DAC 1995
Processor architecture and microarchitecture › instruction set architecture › RISC
RISC processor		 0.011989
The i860TM 64-bit supercomputing microprocessor · SC 1989
Processor architecture and microarchitecture › superscalar processor
superscalar pipeline		 0.011989
The i860TM 64-bit supercomputing microprocessor · SC 1989

Methods — techniques the papers use, named apart from their topics

performance simulator · 0.0
YearPublicationVenuePosition
1995 A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I
abstract
Article Free Access Share on A fast and flexible performance simulator for micro-architecture trade-off analysis on UltraSPARC-I Authors: Marc Tremblay SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , Guillermo Maturana SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , Atsushi Inoue SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile , Les Kohn SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CA SPARC Technology, Sun Microsystems, Inc., 2550 Garcia Avenue, Mountain View, CAView Profile Authors Info & Claims DAC '95: Proceedings of the 32nd annual ACM/IEEE Design Automation ConferenceJanuary 1995 Pages 2–6https://doi.org/10.1145/217474.217479Published:01 January 1995Publication History 10citation307DownloadsMetricsTotal Citations10Total Downloads307Last 12 Months13Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
Marc Tremblay, Guillermo Maturana, Atsushi Inoue, Leslie Kohn
 DAC4
1989 The i860TM 64-bit supercomputing microprocessor
abstract
The Intel i860TM processor is a RISC-based microprocessor incorporating a RISC core with memory management, a floating point unit, and caches on a single chip. The 1,000,000 transistors allow a single chip implementation with highly optimized interunit communication and wide internal data buses. The parallelism and pipelining between the execution units, and the innovative cache management techniques are under explicit control of software. Vectorizable applications can use the pipelined adder and multiplier units to achieve up to 80 Mflops at 40 Mhz for the inner loops of common calculations. Special instructions allow using the data cache as a flexible vector register and support high data bandwidth from main memory. Finally, to support visualization of data, special hardware for 3D graphics is included.
Leslie Kohn, Neal Margulis
 SC1