The Euclidean distance transform is one of the fundamental operations in image processing. It has been widely used in computer vision, pattern recognition, morphological filtering, and robotics. This paper proposes a systolic algorithm that computes the Euclidean distance map of an N x N binary image in 3N clocks on 2N(2) processing cells. The algorithm is designed so that the hardware resources are reduced; especially no mulitipliers are used and, thus, it facilitates VLSI implementation.

In VLSI and printed wiring board design, routing process usually consists of two stages: the global routing and the detailed routing. The routability checking is to decide whether the global wires can be transformed into the detailed ones or not. In this paper, we propose two graphs, the capacity checking graph and the initial flow graph, for the efficient routability checking.