This paper presents an efficient architecture to handle memory conflicts of a unified turbo decoder which supports multiple standards like HSPA+, 3GPP-LTE, WiMAX, 3GPP2-CDMA2000 and CCSDS. A unified radix-4 turbo decoder is used as the reconflgurable unit which provides double throughput for some standards. A complete memory conflict analysis for different interleaver patterns has been performed and shows the effect of using radix-4 decoding on the memory conflicts for different standards. Such a conflict adds latency and reduces the throughput significantly. A simple controller is designed to manage the conflicts on the fly. The proposed design has a maximum throughput of 283.104 Mbps.

In this paper, an Application Specific Instruction-set Processor (ASIP) architecture to perform all OFDM synchronization tasks is proposed. While applicable to many OFDM systems, the proposed architecture is tested on Long Term Evolution (LTE Rel. 8) and WiMAX 802.16e systems. The synchronization tasks include, but not limited to symbol timing, fine carrier frequency offset (CFO) estimation, coarse CFO estimation, cell search, residual CFO estimation and sampling clock frequency offset estimation. The engine is scalable and runs at 120 MHz with a total gate count of 118k and control overhead less than 10% of total processing cycles. The results of software simulations as well as the results of verilog synthesis are presented.

In this paper, A novel architecture of an Application Specific Instruction Processor (ASIP) for scalable DFT/IDFT DCT/IDCT ID (N-point) and 2D (N × M point) engine is proposed. An in place configurable radix 2/3/4 butterfly, makes possible the implementation of two radix N/M is varied in the form of 2x× 3y. Therefore the engine can support different communication and signal processing applications. A new address generator scheme is proposed which achieves conflict-free memory access. This scheme is based on partitioning the memory to 4 dual-port memory banks with a continuous address generator to accommodate high-speed requirements. Using same reduction techniques, the twiddle factors memory size is reduced to 28%. By taking advantage of programmability, the engine provides more configurability and flexibility in switching between modes in run-time. Moreover it can be easily adapt to new applications. The DFT/DCT engine requires only 1280 clock cycles for a 1024-point DFT-1D and runs at 120 MHz with SQNR 75.2 dB.

Wireless OFDM receivers are subject to sample timing errors, causing both sample period and phase errors. Frequency errors lead to loss of orthogonality between subcarriers, resulting in inter-carrier interference (ICI). On the other hand, phase errors lead to erroneous interpretation of the symbols, which degrades the system performance by increasing the BER. In this paper, a time tracking loop is proposed for OFDM based broadcast systems. The proposed time tracking topology is a fast digital feed-back loop which corrects the timing errors for OFDM based broadcast systems, such as DVB-H and DVB-T, efficiently. The loop is implemented with Verilog code targeting the Xilinx Virtex2 xc2v8000 FPGA and it gives effective signal to error ratio 35dB.

A scheme is proposed for adaptively changing the code rate of coded OFDMA systems via changing the puncturing rate within a single codeword (SCW). In the proposed structure, the data is encoded with the lowest available code rate then it is divided among different resource blocks (tiles) where it is punctured adaptively based on some measure of the channel quality for each tile. The proposed scheme is compared against using multiple codewords (MCWs) where the transmitter divides the data over tiles and encodes them separately. We investigate two different adaptive modulation and coding (AMC) selection methods. The first is a recursive scheme that operates directly on the SNR whereas the second operates on the effective SNR value that is obtained using Mutual Information Effective SNR Mapping (MIESM). We then compare our scheme to Per-Frame Adaptation (PFA) where we fix the modulation and coding scheme (MCS) over a given frame. We show via simulations that when using the recursive rate selection method the SCW scheme significantly outperforms the MCWs and the PFA. It is also shown that applying the MIESM rate selection method, the PFA improves significantly, yet the SCW scheme is the best performer. We also introduce a novel interleaving method prior to puncturing that improves the performance for certain restricted adaptation mechanisms.

Automatic Gain Control (AGC) is an integral part of any radio receiver. It is needed to maintain the signal level within an acceptable range that would yield the best possible SNR at the receiver output. In this paper, an AGC topology that was used for a CMOS, OFDM-based, digital radio receiver is introduced. The basic AGC algorithm is summarized. The AGC works on two stages, the RF stage and the baseband stage. Because the receiver is implemented in CMOS, the granularity of gain change of the signal path was in rather large steps. The AGC algorithm had to support such signal path with a mechanism to ensure limited gain jumps to avoid disrupting the OFDM operation. The algorithm stability is mathematically verified and confirmed via computer simulations.

There is an ever growing need for higher speed communications over existing wireline plant. To achieve even higher throughput, bonding and joint optimization of multiple-input-multiple-output cable bundles attracted attention recently. In this paper we first explain a technique which allows several users to use the same communication medium while at the same time allowing their transmission to be separated at the receiver. This technique would handle single-channel-multiple-users case. The technique is then extended to handle multiple input multiple output (MIMO) channel by jointly optimizing the transmit filters to maximize the throughput over the MIMO channel. This optimization is suitable for multiple-channels-single-user and multiple-channels-multiple-users cases. A 2-D MIMO channel example is given and simulation results show that the joint optimization achieves higher throughput than independent optimization for each channel.

For the single-pair HDSL (HDSL2), the concept of having different upstream and downstream power spectral densities is highlighted. The signal-to-noise ratio (SNR) at the input of the central office HDSL terminal unit (HTU-C) can be enhanced by boosting the power output of the remote user HDSL terminal unit (HTU-R). Further improvement in performance can be achieved by reducing the HTU-C NEXT interference. Two techniques are proposed to reach this goal. The first approach is to reduce the HTU-C transmitter power in the downstream direction for shorter reach cables. The second approach is borrowed from the analog frequency-modulation preemphasis/deemphasis frequency tilting in the upstream direction. Combining the three techniques leads to at least 6-dB SNR margin improvement for the full reach carrier serving area loops.

In this paper, the problem of multiple access over digital subscriber loops is introduced and defined as FIR LTI filter design over linear dispersive channels. The 2-D FIR CAP/QAM based modulation line code is extended to the multi-dimensional system to accommodate multiple access topology. The concept of orthogonality division multiple access, ODMA, is used as the methodology to achieve that goal. The problem of increasing the number of dimensions is stated as a minimax optimization problem, then solved using sequential quadratic programming. 3, 4, and 6-dimensional systems are introduced to support multiple access applications. Computer simulations are carried out to evaluate the performance and functionality of the orthogonal signaling line code.

Carrierless amplitude/phase modulation (CAP) is a viable alternative for digital subscriber loop (DSL) systems such as high-speed DSL, asymmetric DSL, and very high-speed DSL. In this paper, two novel orthogonal-based modulation schemes are introduced for the DSL environment. In the first technique, the conventional two-dimensional (2-D) CAP-16 line code is extended to a three-dimensional (3-D) scheme. The 3-D system is designed so that the new overall transfer matrix maintains perfect reconstruction (PR) of the transmitted information. The system is designed by solving a minimax optimization problem by using the sequential quadratic programming algorithm; this searches the whole space of signals under the PR condition and the DSL constraints. The 3-D CAP system leads to a 50% increase in throughput at the expense of the output signal-to-noise ratio (SNR) degradation by 3-4 dB. It should be noted that this increase in throughput can also be achieved by a CAP-64 system. Nevertheless, the dynamic range of the proposed 3-D CAP approach is 7.4 dB less than CAP-64, which leads to faster equalization. Furthermore, the equalizer performance in the 3-D case is 1-3 dB better, depending on channel and noise considerations. Another application of the multidimensional CAP approach, referred to as orthogonality division multiple access (ODMA) is presented. In this approach, the CAP system is extended to more than three dimensions by maintaining the same overall symbol rate as in the 2-D case. The ODMA system allows multiple-access operation of the DSL communication link with minimal hardware penalty. The performance of the ODMA system for the multiple-access environment is found to match the conventional 2-D CAP, allowing suitable multiple-access topology with minimal complexity overhead. The ODMA system complexity is compared with discrete multitone and is found to have 25% less complexity for the same bit rate. Theoretical analysis of the ODMA system using zero-forcing equalization shows that the equalization process yields better SNR as the number of dimensions increases, asymptotically approaching the intersymbol interference-free matched filter bound.