Demo Data from VLDB 2026 / reviewers in the wild / expert
Kamil Rocki
dblp:47/8296
· DBLP profile ↗
5ranked-venue papers
4as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 4 first-authorArtificial intelligence and machine learning · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
High-performance computing · 57% Processor architecture and microarchitecture · 19% Emerging computing paradigms · 19% | |
| Artificial intelligence
1 paper |
Representation and self-supervised learning · 77% Deep learning architectures and training · 23% |
Topics — the 9 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing › numerical linear algebra › linear solver
iterative linear solvers |
0.4 | 1 | 2020 | Fast stencil-code computation on a wafer-scale processor · SC 2020 |
High-performance computing
scientific computing systems |
0.4 | 1 | 2020 | Fast stencil-code computation on a wafer-scale processor · SC 2020 |
High-performance computing
stencil computation |
0.4 | 1 | 2020 | Fast stencil-code computation on a wafer-scale processor · SC 2020 |
Processor architecture and microarchitecture › multicore design
waferscale processor |
0.4 | 1 | 2020 | Fast stencil-code computation on a wafer-scale processor · SC 2020 |
Machine learning › Representation and self-supervised learning › representation learning › unsupervised representation learning
sparse coding |
0.2 | 1 | 2015 | Effect of Spatial Pooler Initialization on Column Activity in Hierarchical Temporal Memory · AAAI 2015 |
Emerging computing paradigms › neuromorphic computing
hierarchical temporal memory |
0.2 | 1 | 2015 | Effect of Spatial Pooler Initialization on Column Activity in Hierarchical Temporal Memory · AAAI 2015 |
Emerging computing paradigms
neuromorphic computing |
0.2 | 1 | 2015 | Effect of Spatial Pooler Initialization on Column Activity in Hierarchical Temporal Memory · AAAI 2015 |
Memory systems
memory bandwidth |
0.1 | 1 | 2020 | Fast stencil-code computation on a wafer-scale processor · SC 2020 |
Machine learning › Deep learning architectures and training
weight initialization |
0.1 | 1 | 2015 | Effect of Spatial Pooler Initialization on Column Activity in Hierarchical Temporal Memory · AAAI 2015 |
Methods — techniques the papers use, named apart from their topics
spatial pooler · 0.4finite difference · 0.4BiCGStab · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Fast stencil-code computation on a wafer-scale processorabstractThe performance of CPU-based and GPU-based systems is often low for PDE codes, where large, sparse, and often structured systems of linear equations must be solved. Iterative solvers are limited by data movement, both between caches and memory and between nodes. Here we describe the solution of such systems of equations on the Cerebras Systems CS-1, a wafer-scale processor that has the memory bandwidth and communication latency to perform well. We achieve 0.86 PFLOPS on a single wafer-scale system for the solution by BiCGStab of a linear system arising from a 7-point finite difference stencil on a 600 × 595 × 1536 mesh, achieving about one third of the machine's peak performance. We explain the system, its architecture and programming, and its performance on this problem and related problems. We discuss issues of memory capacity and floating point precision. We outline plans to extend this work towards full applications. Kamil Rocki, Dirk Van Essendelft, Ilya Sharapov, Robert Schreiber, Michael Morrison, Vladimir Kibardin, Andrey Portnoy, Jean-Francois Dietiker, Madhava Syamlal, Michael James 0002 |
SC | 1 |
| 2015 | Effect of Spatial Pooler Initialization on Column Activity in Hierarchical Temporal MemoryabstractIn the Hierarchical Temporal Memory (HTM) paradigm the effect of overlap between inputs on the activation of columns in the spatial pooler is studied. Numerical results suggest that similar inputs are represented by similar sets of columns and dissimilar inputs are represented by dissimilar sets of columns. It is shown that the spatial pooler produces these results under certain conditions for the connectivity and proximal thresholds at initialization. Qualitative arguments about the learning dynamics of the spatial pooler are then discussed. Mackenzie Leake, Liyu Xia, Kamil Rocki, Wayne Imaino |
AAAI | 3 |
| 2013 | The Future of Accelerator Programming: Abstraction, Performance or Can We Have Both?abstractIn a perfect world, code would only be written once and would run on different devices with high efficiency. A programmer's time would primarily be spent on thinking about the algorithms and data structures, not on implementing them. To a degree, that used to be the case in the era of frequency scaling on a single core. However, due to power limitations, parallel programming has become necessary to obtain performance gains. But parallel architectures differ substantially from each other, often require specialized knowledge, and typically necessitate reimplementation and fine tuning of application code. These slow tasks frequently result in situations where most of the time is spent reimplementing old rather than writing new code. The goal of our research is to find new programming techniques that increase productivity, maintain high performance, and provide abstraction to free the programmer from these unnecessary and time-consuming tasks. However, such techniques usually come at the cost of substantial performance degradation. This paper investigates current approaches to portable accelerator programming, seeking to answer whether they make it possible to combine high efficiency with sufficient algorithm abstraction. It discusses OpenCL as a potential solution and presents three approaches of writing portable code: GPU-centric, CPU-centric and combined. By applying the three approaches to a real-world program, we show that it is at least sometimes possible to run exactly the same code on many different devices with minimal performance degradation using parameterization. The main contributions of this paper are an extensive review of the current state-of-the-art regarding the stated problem and our original approach of addressing this problem with a generalized excessive-parallelism approach. Kamil Rocki, Martin Burtscher, Reiji Suda |
ICPADS | 1 |
| 2012 | Accelerating 2-opt and 3-opt Local Search Using GPU in the Travelling Salesman ProblemabstractWe are presenting a high-performance GPU implementation of a 2-opt and 3-opt algorithms used to solve the Traveling Salesman Problem. The main idea behind it is to take a route that crosses over itself and reorder it so that it does not. It is a very important local search technique and using GPU to parallelize the search greatly decreases the time needed to find the best edges to be swapped in a route. Our results show, that at least 90% of the time during an Iterative Local Search is spent on the 2-opt itself. Our result show that by using our algorithm for GPU, the time need to find optimal swaps can be decreased approximately 100 times in case of 2-opt compared to a sequential CPU code and more than 220-fold speedup can be observed in case of 3-opt search achieving more than 430 GFLOPS on a single Tesla C2075 GPU. Kamil Rocki, Reiji Suda |
CCGRID | 1 |
| 2012 | Brief announcement: a GPU accelerated iterated local search TSP solverabstractIn this paper we are presenting high performance GPU implementations of the 2-opt and 3-opt local search algorithms used to solve the Traveling Salesman Problem. This type of local search optimization is a very effective and fast method in case of small problem instances. However, the time spent on comparing the graph edges grows significantly with the problem size growing. They are usually a part of global search algorithms such as Iterated Local Search (ILS). Our results showed, that at least 90% of the time during a single ILS run is spent on the local search itself. Therefore we utilized GPU to parallelize the local search and that greatly improved the overall speed of the algorithm. Our results show that the GPU accelerated algorithm finds the optimal swaps approximately 3 to 26 times compared to parallel CPU code using 32 cores, operating at the speed of over 1.5 TFLOPS on a single GeForce GTX 680 GPU. The preliminary experimental studies show that the optimization algorithm using the GPU local search converges 10 to 50 times faster on average compared to the sequential CPU version, depending on the problem size. Kamil Rocki, Reiji Suda |
SPAA | 1 |