Jun Furuta

dblp:47/8791 · DBLP profile ↗
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8ranked-venue papers
1as first author
4since 2021 · last 2026
0000-0003-0146-3077ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 1 first-author · 4 since 2021Software engineering, systems software and programming languages · 6 · 4 since 2021
YearPublicationVenuePosition
2026 Impact of Locations of Circuit Components on Multiple Cell Upset Mitigation in a 22 nm Bulk Process
Shuhei Mandai, Ryuichi Nakajima, Arata Matsumoto, Yusaku Nakaoka, Hikaru Nakamoto, Sotaro Taniguchi, Shinobu Onoda, Jun Furuta, Kazutoshi Kobayashi
IOLTS8
2025 Comparative Analysis of TID Effects in a 65 nm FD-SOI Process Under Gamma-Ray and Alpha-Ray Irradiation
abstract
Two types of ring oscillators (ROs) fabricated using a 65 nm FD-SOI process were used to compare total ionizing dose (TID) characteristics under gamma-ray and alpha-ray irradiation. By employing two ROs with nearly identical circuit structures, the electric field dependence of the TID effect was evaluated. Gamma-ray irradiation resulted in significant degradation differences between the ROs, indicating strong electric field dependence, whereas alpha-ray irradiation showed negligible differences, suggesting weak dependence. These variations are attributed to differences in initial recombination rates due to the higher linear energy transfer (LET) of alpha particles than gamma-rays. Additionally, the recovery rate under alpha-ray irradiation was lower than that under gamma-ray irradiation. These findings suggest that when using alpha-ray irradiation as an alternative to gamma-ray irradiation, compensation is mandatory.
Hikaru Nakamoto, Taiki Ozawa, Ryuichi Nakajima, Haruto Sugisaki, Keita Yoshida, Jun Furuta, Kazutoshi Kobayashi
IOLTS6
2023 Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation
abstract
In 22 nm FDSOI, the flip-well structure is used instead of the standard-well structure. We evaluated soft-error tolerance by heavy-ion irradiation tests on standard and stacked flip-flops (STDFF and STACKEDFF) in the flip-well structure. The error probability of STACKEDFF was significantly smaller than STDFF. Therefore, the stacked structure is also effective against soft error in the flip-well structure. However, as the supply voltage is lowered, even STACKEDFF becomes vulnerable to soft errors under certain conditions. The origin of these errors was pMOSFETs. Therefore, soft error countermeasures are needed to account for errors from pMOSFETs.
Shotaro Sugitani, Ryuichi Nakajima, Takafumi Ito, Jun Furuta, Kazutoshi Kobayashi, Mathieu Louvat, Francois Jacquet, Jean-Christophe Eloy, Olivier Montfort, Lionel Jure, Vincent Huard
IOLTS4
2022 Radiation Hardened Flip-Flops Minimizing Area, Power, and Delay Overheads with 1/100 Lower α-SER in a 130 nm Bulk Process
abstract
We examined the radiation hardness of the several types of flip-flops fabricated in a 130 nm bulk process by alpha-ray irradiation tests and circuit simulation. The simulated $\alpha -$SER of FFs with the critical charge larger than 14 fC becomes 1/100 of that with the critical charge of 10 fC. We propose a radiation-hardened flip-flop minimizing area, delay, and power overheads with 1/100 lower $\alpha -$SER in a 130 nm bulk process. The radiation hardness is achieved by adding series transistors and wires with only less than 14% area, 7% delay, and 12% power overheads in order to increase the critical charge. Alpha-ray irradiation tests revealed that the proposed method can reduce soft error rates to 1/100.
Ryuichi Nakajima, Kazuya Ioki, Jun Furuta, Kazutoshi Kobayashi
IOLTS3
2019 Comparison of Radiation Hardness of Stacked Transmission-Gate Flip Flop and Stacked Tristate-Inverter Flip Flop in a 65 nm Thin BOX FDSOI Process
abstract
We examined radiation hardness of a stacked transmission-gate flip flop and a stacked tristate-inverter flip flop, which are called STACKEDTGFF and STACKEDTIFF respectively. Stacked flip flops fabricated in FDSOI are stronger against soft errors than in bulk because all transistor channels are isolated by a BOX layer. We evaluated soft-error tolerance by neutron and heavy-ion irradiation. STACKEDTIFF is faster than STACKEDTGFF because of the difference of the number of gates along the data path. Those FFs did not flip by neutrons and the normal incidence of heavy ions with LET of less than 40 MeV-cm2mg. They are stronger against soft errors than a standard TGFF by two order of magnitude. We also investigated incident angle dependence of those FFs by heavy ions.
Mitsunori Ebara, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi
IOLTS3
2019 Total Ionizing Dose Effects by alpha irradiation on circuit performance and SEU tolerance in thin BOX FDSOI process
abstract
Total ionizing dose (TID) effect is a phenomenon that threatens the reliability of transistors under high-radiation environments. TID is caused by radiation-induced trapped holes in oxide insulator. We evaluated the effects of TID on fully-depleted silicon on insulator (FDSOI) and bulk processes by measuring frequency of a ring oscillator (RO) and single event upset tolerance of flip flops (FFs). On the bulk process, TID induced Vth shift of nMOSFET, leads to increase of the RO frequency. On the FDSOI process, IR drop induced by large amount of leakage current flowing above buried oxide (BOX) layer decreases RO frequency. We also demonstrated that TID effects recovers by thermal annealing.
Takashi Yoshida, Kazutoshi Kobayashi, Jun Furuta
IOLTS3
2019 Characterizing SRAM and FF soft error rates with measurement and simulation
Masanori Hashimoto, Kazutoshi Kobayashi, Jun Furuta, Shin-ichiro Abe, Yukinobu Watanabe
Integr.3
2011 A 65nm flip-flop array to measure soft error resiliency against high-energy neutron and alpha particles
abstract
We fabricated a 65nm LSI including flip-flop array to measure soft error resiliency against high-energy neutron and alpha particles. It consists of two FF arrays as follows. One is an array composed of redundant FFs to confirm radiation hardness of the proposed and conventional redundant FFs. The other is an array composed of conventional D-FFs to measure SEU (Single Event Upset) and MCU(Multiple Cell Upset) by the distance from tap cells.
Jun Furuta, Chikara Hamanaka, Kazutoshi Kobayashi, Hidetoshi Onodera
ASP-DAC1