Demo Data from VLDB 2026 / reviewers in the wild / expert
Harlan E. Husmann
dblp:48/6940
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 1988
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 87% Parallel and multicore computing · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation › parallel system performance
speedup modeling |
0.0 | 1 | 1986 | On Input/Output Speedup in Tightly Coupled Multiprocessors · IEEE Trans. Computers 1986 |
Performance modeling and evaluation
workload characterization |
0.0 | 1 | 1986 | On Input/Output Speedup in Tightly Coupled Multiprocessors · IEEE Trans. Computers 1986 |
Parallel and multicore computing › parallel computing
parallel application performance |
0.0 | 1 | 1986 | On Input/Output Speedup in Tightly Coupled Multiprocessors · IEEE Trans. Computers 1986 |
Methods — techniques the papers use, named apart from their topics
empirical measurement · 0.0analytic speedup modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1988 | Automatic Compound Function Definition for Multiprocessors
Harlan E. Husmann, David J. Kuck, David A. Padua |
ICPP (2) | 1 |
| 1986 | On Input/Output Speedup in Tightly Coupled MultiprocessorsabstractPrevious models of program speedup on parallel architectures tend to ignore I/O activity and other important issues. In this paper we derive analytic speedup models including I/O activities. We show that ignoring I/O yields conservative speedup results. We explore the effectiveness of using hardware format conversion units in multiprocessors [33]. We prove that hardware parallel format conversion loses its edge over software parallel format conversion if the ratio of the number of processors to I/O bandwidth increases. For a given number of processors, program speedup is more sensitive to the available I/O bandwidth rather than the format conversion speed. Ninety-one Fortran programs are used in various experiments to verify our models and conclusions. Most of the programs are I/O bound. Our empirical results show that including I/O activity improves the speedup factor for 78 percent of the programs, and 18 percent of the programs are sped up only due to faster I/O activities. For a serial machine, using hardware format conversion units designed in [13] reduces program execution time by an average factor of three. The software format conversion speed used is obtained from direct measurements on an IBM 4341 running CMS and a CDC Cyber 175 running NOS. For multiprocessor systems a factor of eight increase in the processors to I/O bandwidth ratio reduces the effectiveness of hardware format conversion to an average factor of 1.36. Walid A. Abu-Sufah, Harlan E. Husmann, David J. Kuck |
IEEE Trans. Computers | 2 |