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M. J. McGinnis

dblp:49/10968 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1983
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.011983
APSS: An automatic PLA synthesis system · DAC 1983
Electronic design automation › logic synthesis › programmable logic array
programmable logic array design
0.011983
APSS: An automatic PLA synthesis system · DAC 1983
YearPublicationVenuePosition
1983 APSS: An automatic PLA synthesis system
M. W. Stebnisky, M. J. McGinnis, Joseph C. Werbickas, Rathin Putatunda, A. Feller
DAC2