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Cheng Yang 0013

dblp:49/1457-13 · DBLP profile ↗
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3ranked-venue papers
1as first author
3since 2021 · last 2025
0000-0002-8087-3367ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 since 2021Artificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
3 papers
Efficient and distributed learning · 89% Robot navigation and mapping · 11%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Hardware accelerators and domain-specific architectures · 81% Energy-efficient computing · 19%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Efficient and distributed learning
distributed training
0.912025
Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture · MICRO 2025
Machine learning › Efficient and distributed learning
model compression
0.912025
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model · CVPR 2025
Machine learning › Efficient and distributed learning › inference efficiency
vision-language model inference efficiency
0.912025
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model · CVPR 2025
Machine learning › Efficient and distributed learning › model compression › token pruning
visual token pruning
0.912025
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model · CVPR 2025
Hardware accelerators and domain-specific architectures
machine learning accelerator
0.912025
Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture · MICRO 2025
Energy-efficient computing › energy-efficient architecture
energy-efficient accelerator
0.812024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024
Hardware accelerators and domain-specific architectures
model compression
0.812024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024
Hardware accelerators and domain-specific architectures › machine learning accelerator
neural network accelerator
0.812024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024
Hardware accelerators and domain-specific architectures › robotics accelerator
SLAM accelerator
0.812024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024
Machine learning › Efficient and distributed learning › KV cache management
KV cache compression
0.312025
TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model · CVPR 2025
Operating systems › resource management › process management
CPU scheduling
0.312025
Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture · MICRO 2025
Robotics › Robot navigation and mapping › SLAM
neural SLAM
0.212024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024
Robotics › Robot navigation and mapping
SLAM
0.212024
Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM · DAC 2024

Methods — techniques the papers use, named apart from their topics

mathematical optimization · 2.6hierarchical table-format abstraction · 2.6model compression · 1.5microarchitectural optimization · 1.5dataflow optimization · 1.5visual-aware cost function · 0.9inference-time optimization · 0.9
YearPublicationVenuePosition
2025 TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model
abstract
Vision-Language Models (VLMs) demand substantial computational resources during inference, largely due to the extensive visual input tokens for representing visual information. Previous studies have noted that visual tokens tend to receive less attention than text tokens, suggesting their lower importance during inference and potential for pruning. However, their methods encounter several challenges: reliance on greedy heuristic criteria for token importance and incompatibility with FlashAttention and KV cache. To address these issues, we introduce TopV, a compatible TOken Pruning with inference Time Optimization for fast and low-memory VLM, achieving efficient pruning without additional training or fine-tuning. Instead of relying on attention scores, we formulate token pruning as an optimization problem, accurately identifying important visual tokens while remaining compatible with FlashAttention. Additionally, since we only perform this pruning once during the prefilling stage, it effectively reduces KV cache size. Our optimization framework incorporates a visual-aware cost function considering factors such as Feature Similarity, Relative Spatial Distance, and Absolute Central Distance, to measure the importance of each source visual token, enabling effective pruning of low-importance tokens. Extensive experiments demonstrate that our method outperforms previous token pruning methods, validating the effectiveness and efficiency of our approach.
Cheng Yang 0013, Yang Sui 0001, Jinqi Xiao, Lingyi Huang, Yu Gong 0003, Chendi Li, Jinghua Yan, Yu Bai 0009, P. Sadayappan, Xia Ben Hu, Bo Yuan 0001
CVPR1
2025 Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture
abstract
Tiled architectures have emerged as a compelling platform for scaling deep neural network (DNN) execution, offering both compute density and communication efficiency.To harness their full potential, effective inter-layer scheduling is crucial for managing operation order, memory behavior, and compute resource coordination.However, current schedulers often fall short due to three persistent issues: incomplete treatment of core design factors, limited flexibility in handling diverse workload structures, and reliance on heuristic search algorithms with poor convergence.In this work, we trace these limitations to the absence of a unified and expressive scheduling representation.We introduce Crane, a framework that addresses these gaps through a hierarchical tableformat abstraction capable of encoding rich scheduling semantics.Crane supports both inference and training workloads, and reformulates scheduling as a mathematically structured optimization problem, enabling more complete and efficient exploration of the scheduling space.Evaluations show that Crane reduces energydelay product by up to 21.01× and improves scheduling speed by at least 2.82× over state-of-the-art baselines.
Yu Gong 0003, Lingyi Huang, Haodong Chang, Rongjian Liang, Cheng Yang 0013, Zhexiang Tang, Jiang Hu 0001, Bo Yuan 0001
MICRO5
2024 Invited: Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAM
abstract
In this paper, we introduce a novel approach to enhancing neural network-based Simultaneous Localization and Mapping (SLAM) through the integration of model compression techniques and customized hardware architecture that focuses on micro-architectural and dataflow optimizations to improve computational efficiency and performance. Experiments across different scenarios demonstrate that the proposed approach achieves significant improvement.
Lingyi Huang, Cheng Yang 0013, Yu Gong 0003, Yang Sui 0001, Xiao Zang, Anthony Goeckner, Qi Zhu 0002, Bo Yuan 0001
DAC2