We propose a general methodology to speed up the test generation process for circuits with high-level primitives. Our search procedure is a variation of depth first search that tries to fully exploit the capabilities of a computer to execute complex arithmetic and logical operations. We present techniques for signal value justification, and fault propagation, which are used by our algorithm. We have implemented a dependency-directed backtracking method to speed up our algorithm. This methodology has been applied to six circuits and the results are found to be very encouraging.

The functional diagnostic methodology (FDM) used to develop the diagnostics for the research parallel processor prototype (RP3) is described. The FDM approach uses the instruction set to diagnose the computer system. In order to optimize the size of the diagnostic procedures, the subsystem is partitioned into modules, and the modules are further divided into a set of submodules or primitive logic components. The diagnostic procedures to test these basic submodules procedures to test these basic submodules and primitive logic components are then developed. The fault model that describes the failure modes considered in the FDM is presented. The FDM is illustrated using the ROMP processor as an example.>