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Samuel P. Harbison

dblp:49/5013 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Embedded and real-time systems · 62% Processor architecture and microarchitecture · 37% Electronic design automation · 1%
Software engineering, system software, and programming languages
2 papers
Software maintenance and evolution · 43% Operating systems · 43% Compilers and program optimization · 14%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
instruction set architecture
0.021999
System-Level Hardware/Software Trade-offs · DAC 1999
An Architectural Alternative to Optimizing Compilers · ASPLOS 1982
Embedded and real-time systems
embedded processor
0.011999
System-Level Hardware/Software Trade-offs · DAC 1999
Embedded and real-time systems
embedded system design
0.011999
System-Level Hardware/Software Trade-offs · DAC 1999
Operating systems › real-time systems
real-time operating systems
0.011999
System-Level Hardware/Software Trade-offs · DAC 1999
Software maintenance and evolution
software configuration
0.011999
System-Level Hardware/Software Trade-offs · DAC 1999
Compilers and program optimization
dynamic optimization
0.011982
An Architectural Alternative to Optimizing Compilers · ASPLOS 1982
Processor architecture and microarchitecture › instruction set architecture
high-level language architecture
0.011982
An Architectural Alternative to Optimizing Compilers · ASPLOS 1982
Electronic design automation
hardware/software co-design
0.011982
An Architectural Alternative to Optimizing Compilers · ASPLOS 1982

Methods — techniques the papers use, named apart from their topics

hardware-software co-design · 0.0dynamic optimization · 0.0
YearPublicationVenuePosition
1999 System-Level Hardware/Software Trade-offs
abstract
Operating systems and development tools can impose overly general requirements that prevent an embedded system from achieving its hardware performance entitlement. It is time for embedded processor designers to become more involved with system software and tools. 1.1 Keywords Digital signal processors, instruction set architecture, compiler, real-time operating system, software configuration. 2.
Samuel P. Harbison
DAC1
1982 An Architectural Alternative to Optimizing Compilers
abstract
Programming languages are designed to make programming productive. Computer architectures are designed to make program execution efficient. Although architectures should be designed with programming languages in mind, it may be as inappropriate to make the computer execute the programming language directly it is to make the programmer use machine language. It is the compiler's job to match the programming language and the computer architectures, and therefore making compiler's efficient and easy to write are important design goals of a complete hardware/software system. This paper summerizes research completed in 1980 [5] on a computer architecture, TM, that takes over some of the more burdensome tasks of optimizing compilers for high-level-languages (HLL's), performing these tasks dynamically during the execution of the object program. This is a different approach to making compilers efficient than is commonly taken; more common approaches include devising more efficient optimization algorithms[I], being clever about when to do optimizations [4], and building the compilers semiautomatically [6].
Samuel P. Harbison
ASPLOS1