We present closed form analytical expressions for the mutual inductance between intentional inductors. The formalism is applicable for border to border separations that are longer than 0(1/10) of the inductor radius. The results are exact in leading order multi-pole expansion for the magnetic field generated by a superposition of current loops, acting on an external device. The derived expressions are simple analytical formulae. We present examples for the closed form expressions for a number of configurations used by RF designers including non Manhattan devices. The computational complexity of the result is linear with the number of segments. Detailed comparisons against standard methods are included, the CPU gains are two orders of magnitude. The formulae are useful for quick estimation of magnetic noise parameters during RF circuit layout synthesis

This paper examines the controversy between two approaches to inductance extraction: loop versus partial treatments for integrated circuit applications. We advocate the first one, and explicitly show that the alternative demands monopole-like magnetic configurations as well as dense inductance matrices. We argue that the uncertainties in the loop inductance treatment associated with possibly unknown return paths are in fact negligible for frequencies where inductance effects are important. Within the loop formulation, we develop an efficient way of computing mutual inductances between loops in terms of the field generated by a magnetic dipole. We derive easily computable analytical formulas. On numerical simulations, this dipole approximation (DA) shows good accuracy when compared to FastHenry, down to distances smaller than 30 /spl mu/m for 90-nm lithography. The DA leads naturally to selection rules for discarding the coupling for certain geometrical configurations, an experimentally verifiable prediction.

The present work is centered in the controversy between two approaches to inductance extraction: loop vs. partial treatments for IC applications. We advocate for the first one, justifying this claim in terms of representing more realistically the physical situation, as well as having better sparseness properties. We argue that the drawbacks of loop inductance treatment are small for frequencies above 1 GHz. Within the loop inductance formulation, we develop an efficient way of calculating mutual inductances between loops in terms of the field generated by a magnetic dipole. On numerical simulations, the dipole approximation shows good accuracy when compared to FastHenry, down to distances of 30μ for 0.13μ processes. The dipole approximation leads naturally to selection rules for discarding certain couplings that can be experimentally verified.

With the onset of gigahertz frequencies on clocked digital systems, inductance effects become significant. We investigate appropriate regimes where signal propagation on an IC can be characterized as resulting from transmission line (TL) behavior. The signals propagate at a speed in the proximity of the speed of light in the medium. Our starting points are exact solutions in the time domain to the TL equations. A methodology to evaluate the feasible domains of physical and electrical variables that permit TL propagation is given. We develop fast and accurate computational methods for inductance and capacitance calculations. A general expression of the time delay in the presence of finite rise time and finite load capacitance for TL propagation is derived. We analyze a clock-synthesis method based on sandwiched balanced H-trees consistent with TL propagation. We find the feasible physical domains by solving iteratively two nonlinear equations in a space spanned by two continuous variables, with four parameters. To further assert its applicability we remove common assumptions such as the constancy of the electromagnetic parameters, zero rise time, and load capacitance. The spectrum of configurations is satisfactory at 130 nm and scales well into the 45-nm generation.

We investigate appropriate regimes for transmission line propaga-tion of signals on digital integrated circuits. We start from exact solutions to the transmission line equations proposed by Davis and Meindl. We make appropriate modifications due to finite rise time. They affect the delay calculation and hypothesis pertaining the con-stancy of the electromagnetic parameters. We study these effects in detail. To find the domain of physical variables where transmission line behavior is feasible, we pose the problem as a nonlinear mini-mization problem in a space spanned by two continuous variables, with four parameters. From the resulting solutions and employing monotonicity properties of the functional we extract regimes of va-lidity. These regimes of validity happen to be commensurate with what is reachable and doable with todays leading technologies. We complete this study with a qualitative analysis of driver insertion in the presence of transmission lines. The resulting configurations are suitable for the development of an improved clock design dis-cipline. 1.