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Weihu Wang

dblp:49/5821 · DBLP profile ↗
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6ranked-venue papers
2as first author
3since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 3

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
2 papers
Efficient and distributed learning · 100%
Computer architecture, parallel and distributed computing, and storage systems
3 papers
GPUs and heterogeneous computing · 44% Hardware accelerators and domain-specific architectures · 28% High-performance computing · 28%

Topics — the 9 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Efficient and distributed learning › model compression
quantization
0.912025
MXBLAS: Accelerating 8-bit Deep Learning with a Unified Micro-Scaled GEMM Library · SC 2025
Hardware accelerators and domain-specific architectures › machine learning accelerator
DNN acceleration
0.912025
MXBLAS: Accelerating 8-bit Deep Learning with a Unified Micro-Scaled GEMM Library · SC 2025
High-performance computing › sparse linear algebra
sparse matrix multiplication
0.912025
Voltrix: Sparse Matrix-Matrix Multiplication on Tensor Cores with Asynchronous and Balanced Kernel Optimization · USENIX ATC 2025
GPUs and heterogeneous computing › GPU computing
tensor cores
0.912025
Voltrix: Sparse Matrix-Matrix Multiplication on Tensor Cores with Asynchronous and Balanced Kernel Optimization · USENIX ATC 2025
Machine learning › Efficient and distributed learning
distributed training
0.812024
Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching · SC 2024
Machine learning › Efficient and distributed learning › model compression › embedding compression
embedding table compression
0.812024
Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching · SC 2024
Machine learning › Efficient and distributed learning
model compression
0.812024
Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching · SC 2024
Machine learning › Efficient and distributed learning › distributed training
recommendation model training
0.812024
Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching · SC 2024
GPUs and heterogeneous computing › multi-GPU computing
multi-GPU training
0.212024
Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching · SC 2024

Methods — techniques the papers use, named apart from their topics

quantization · 1.7microscaling · 1.7tensor-train decomposition · 1.5pipeline training · 1.5micro-batching · 1.5
YearPublicationVenuePosition
2025 MXBLAS: Accelerating 8-bit Deep Learning with a Unified Micro-Scaled GEMM Library
abstract
Micro-scaling General Matrix Multiplication (MX-GEMM), which leverages 8-bit micro-scaling format (MX-format) inputs, represents a significant step forward in accelerating deep learning workloads. The MX-format space is diverse, encompassing various scaling patterns and granularities. However, current MX-GEMM implementations typically adopt a model-oriented approach, where format customization is tailored to individual models. This results in three key limitations: rigid problem-kernel coupling, inefficient promotion operations, and overlooked quantization overhead.
Weihu Wang, Yaqi Xia, Donglin Yang, Xiaobo Zhou 0002, Dazhao Cheng
SC1
2025 Voltrix: Sparse Matrix-Matrix Multiplication on Tensor Cores with Asynchronous and Balanced Kernel Optimization
Yaqi Xia, Weihu Wang, Donglin Yang, Xiaobo Zhou 0002, Dazhao Cheng
USENIX ATC2
2024 Accelerating Distributed DLRM Training with Optimized TT Decomposition and Micro-Batching
abstract
Deep Learning Recommendation Models (DLRMs) are pivotal in various sectors, yet they are hindered by the high memory demands of embedding tables and the significant communication overhead in distributed training environments. Traditional approaches, like Tensor-Train (TT) decomposition, although effective for compressing these tables, introduce substantial computational burdens. Furthermore, existing frameworks for distributed training are inadequate due to the excessive data exchange requirements.This paper proposes EcoRec, an advanced library designed to expedite the training of DLRMs through a synergistic integration of TT decomposition technology and distributed training. EcoRec introduces a novel computation pattern that eliminates redundancy in TT operations, alongside an efficient multiplication pathway, significantly reducing computational time. Additionally, it provides a unique micro-batching technique with sorted indices to decrease memory demands without additional computational costs. EcoRec also features a novel pipeline training system for embedding layers, ensuring balanced data distribution and enhanced communication efficiency. EcoRec, built on PyTorch and CUDA, has been evaluated on a 32 GPU cluster. The results show EcoRec significantly outperforms the existing ELRec system, achieving up to a $3.1 \times$ speedup and a 38.5% reduction in memory requirements. EcoRec marks a notable advancement in high-performance DLRM training.
Weihu Wang, Yaqi Xia, Donglin Yang, Xiaobo Zhou 0002, Dazhao Cheng
SC1
2012 Detecting anti-patterns in Java EE runtime system model
abstract
With the increasing complexity of enterprise applications, it becomes very challenging to create software systems which can exhibit a satisfactory performance behavior. In current system development practice, it often inevitably exists some "anti-patterns", which usually impede the performance or maintainability of software systems. Manually investigating anti-patterns in systems is a time-consuming and labor intensive task. To deal with this problem, we propose a general anti-pattern detection approach for Java EE application. Firstly, we propose a Java EE meta-model, based on which, we use QVT language to specify the detection process of anti-patterns. Secondly, we implement our approach on a runtime architecture-based reflective framework. When a Java EE application runs on one of the supported application servers, we can execute QVT script to detect whether or not there exists a specific anti-pattern in current system and get the report of potential problem components. At last, we perform a case study based on 35 well-known anti-patterns to evaluate the effectiveness and applicability of our approach.
Yanchun Sun, Weihu Wang, Gang Huang 0001
Internetware4
2011 Simulation-based analysis of middleware service impact on system reliability: Experiment on Java application server
Gang Huang 0001, Weihu Wang, Hong Mei 0001
J. Syst. Softw.2
2007 A Middleware-based Approach to Model Refactoring at Runtime
abstract
Model refactoring is emerging as a desirable means to improve design model by restructuring it while preserving the behavior properties. It applies the concept of refactoring to a higher level of abstraction and makes refactoring more convenient and effective. Model refactoring always arises at design phase, but unfortunately, 7(days) times 24(hours) high availability requires that refactoring takes effect at runtime without stopping the running systems. In this paper, we present a middleware-based approach to applying model refactoring for component based applications at runtime. First of all, ill-structures in an application are abstracted as bad patterns, each of which has at least one good pattern abstracting the refactored part in the application without the ill-structure. People can define the bad/good patterns using a MOF-based metamodel. After that, with the help of middleware, the ill-structures will be automatically detected and removed by refactoring the running application under the guide of predefined patterns.
Ling Lan, Gang Huang 0001, Weihu Wang, Hong Mei 0001
APSEC3