Demo Data from VLDB 2026 / reviewers in the wild / expert
Harjot Gill
dblp:50/10842
· DBLP profile ↗
5ranked-venue papers
2as first author
0since 2021 · last 2014
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 3 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
3 papers |
Wireless networking · 33% Software-defined and programmable networks · 29% Network measurement and analytics · 22% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Software-defined and programmable networks
programmable data plane |
0.2 | 2 | 2013 | SP4: scalable programmable packet processing platform · SIGCOMM 2012 Scalanytics: a declarative multi-core platform for scalable composable traffic analytics · HPDC 2013 |
Wireless networking › channel assignment
channel selection |
0.2 | 1 | 2014 | PUMA: Policy-Based Unified Multiradio Architecture for Agile Mesh Networking · IEEE/ACM Trans. Netw. 2014 |
Routing and switching
routing |
0.2 | 1 | 2014 | PUMA: Policy-Based Unified Multiradio Architecture for Agile Mesh Networking · IEEE/ACM Trans. Netw. 2014 |
Wireless networking
wireless mesh network |
0.2 | 1 | 2014 | PUMA: Policy-Based Unified Multiradio Architecture for Agile Mesh Networking · IEEE/ACM Trans. Netw. 2014 |
Processor architecture and microarchitecture
chip multiprocessor |
0.2 | 1 | 2013 | Scalanytics: a declarative multi-core platform for scalable composable traffic analytics · HPDC 2013 |
Software-defined and programmable networks › programmable data plane
software packet processing |
0.1 | 1 | 2012 | SP4: scalable programmable packet processing platform · SIGCOMM 2012 |
Network measurement and analytics
traffic analysis |
0.1 | 2 | 2013 | Scalanytics: a declarative multi-core platform for scalable composable traffic analytics · HPDC 2013 SP4: scalable programmable packet processing platform · SIGCOMM 2012 |
Methods — techniques the papers use, named apart from their topics
declarative constraint solving · 0.2colog · 0.2machine learning · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | The design and implementation of the A3 application-aware anonymity platform
Micah Sherr, Harjot Gill, Taher Saeed, Andrew Mao, William R. Marczak, Saravana Soundararajan, Wenchao Zhou, Boon Thau Loo, Matt Blaze |
Comput. Networks | 2 |
| 2014 | PUMA: Policy-Based Unified Multiradio Architecture for Agile Mesh NetworkingabstractThis paper presents the design and implementation of PUMA, a declarative constraint-solving platform for policy-based routing and channel selection in multiradio wireless mesh networks. In PUMA, users formulate channel selection policies as optimization goals and constraints that are concisely declared using the Colog declarative language. To efficiently execute Colog programs in a distributed setting, PUMA integrates a high-performance constraint solver with a declarative networking engine. We demonstrate the capabilities of PUMA in defining distributed protocols that cross-optimize across channel selection and routing. We have developed a prototype of the PUMA system that we extensively evaluated in simulations and on the ORBIT testbed. Our experimental results demonstrate that PUMA can flexibly and efficiently implement a variety of centralized and distributed channel selection protocols that result in significantly higher throughput compared to single-channel and identical-channel assignment solutions. Changbin Liu, Ricardo Correa, Harjot Gill, Tanveer Gill, Shivkumar Muthukumar, Taher Saeed, Boon Thau Loo, Prithwish Basu |
IEEE/ACM Trans. Netw. | 3 |
| 2013 | Scalanytics: a declarative multi-core platform for scalable composable traffic analytics
Harjot Gill, Dong Lin, Xianglong Han, Cam Nguyen, Tanveer Gill, Boon Thau Loo |
HPDC | 1 |
| 2012 | Recent Advances in Declarative Networking
Boon Thau Loo, Harjot Gill, Changbin Liu, Yun Mao, William R. Marczak, Micah Sherr, Anduo Wang, Wenchao Zhou |
PADL | 2 |
| 2012 | SP4: scalable programmable packet processing platformabstractWe propose the demonstration of SP4, a software-based programmable packet processing platform that supports (1) stateful packet processing useful for analyzing traffic flows with session semantics, (2) uses a task-stealing architecture that automatically leverages multi-core processing capabilities in a load-balanced manner without the need for explicit performance profiling, and (3) a declarative language for rapidly specifying and composing new packet processing functionalities from reusable modules. Our demonstration showcases the use of SP4 for performing high-throughput analysis of traffic traces for a variety of applications, such as filtering out unwanted traffic and detection of DDoS attacks using machine learning based analysis. Harjot Gill, Dong Lin, Lohit Sarna, Robert Mead, Kenton C. T. Lee, Boon Thau Loo |
SIGCOMM | 1 |