VLDB 2026 Research / reviewers in the wild / expert
Yuji Awano
dblp:50/2075
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › emerging device technologies
carbon nanotube field-effect transistor |
0.1 | 1 | 2010 | Carbon Nanotubes for VLSI: Interconnect and Transistor Applications · Proc. IEEE 2010 |
Integrated circuit design › interconnect
carbon nanotube interconnect |
0.1 | 1 | 2010 | Carbon Nanotubes for VLSI: Interconnect and Transistor Applications · Proc. IEEE 2010 |
Integrated circuit design
VLSI design |
0.0 | 1 | 2010 | Carbon Nanotubes for VLSI: Interconnect and Transistor Applications · Proc. IEEE 2010 |
Methods — techniques the papers use, named apart from their topics
gate oxide charge control · 0.1chemical vapor deposition · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Carbon Nanotubes for VLSI: Interconnect and Transistor ApplicationsabstractCarbon nanotubes (CNTs) offer unique properties such as the highest current density, ballistic transport, ultrahigh thermal conductivity, and extremely high mechanical strength. Because of these remarkable properties, they have been expected for use as wiring materials and as alternate channel materials for extending complementary metal-oxide-semiconductor (CMOS) performance in future very large scale integration (VLSI) technologies. In this paper, we report the present status of CNT growth technologies and the applications for via interconnects (vertical wiring) and field-effect transistors (FETs). We fabricated CNT via and evaluated its robustness over a high-density current. In our technology, multiwalled carbon nanotubes (MWNTs) were successfully grown at temperatures as low as 365°C using Co catalyst nanoparticles, which were formed and deposited by a custom-designed particle generation and deposition system. The density of MWNTs grown at 450°C reaches more than 1×1012/cm2. MWNTs were grown in via holes with a diameter as small as 40 nm. The resistance of CNT vias with a diameter of 160 nm was found to be of the same order as that of tungsten plugs. The CNT via was able to sustain a current density as high as 5.0×106A/cm2at 105°C for 100 h without any deterioration in its properties. We propose a Si-process compatible technique to control carrier polarity of CNFETs by utilizing fixed charges introduced by the gate oxide. High-performancep- andn-type CNFETs and CMOS inverters with stability in air have been realized. Yuji Awano, Shintaro Sato, Mizuhisa Nihei, Tadashi Sakai, Yutaka Ohno, Takashi Mizutani |
Proc. IEEE | 1 |