This paper proposes a method for adapting an object-invariant action model for stacking operations. The proposed approach results in the generalization of stacking operations for multiple objects, in contrast to handcrafted action model-based task and motion planning (TAMP). Action model adaptation for new object stacking is done by drawing inferences using intuitions and learning a reward from visual clues based on the heuristically defined reward function. With this reward, the action model adaptation problem is formulated as an n-armed bandit problem. Additionally, an efficient action selection strategy is proposed for the n-armed bandit problem, which leads to fast convergence. The agent repetitively interacts with the environment in real-time to adapt the action model for the new object. After adaptation, the agent is capable of stacking objects with varying poses. The proposed approach is tested in simulation using the URS manipulator with a two-finger gripper. The proposed adaptive action model-based TAMP outperforms the traditional handcrafted action model-based TAMP by a significant margin in terms of success rate.

Despite significant advances in recent years, the problem of image stitching still lacks a robust solution. Most of the feature based image stitching algorithms perform image alignment based on either homography-based transformation or content-preserving warping. Pairwise homography-based approach miserably fails to handle parallax whereas content-preserving warping approach does not preserve the structural property of the images. In this paper, we propose a nonlinear optimization to find out the global homographies using pairwise homography estimates and point correspondences. We further compute local warping based alignment to mitigate the aberration caused by noises in the global homography estimation. To this end, we incorporate geometric as well as photometric constraints to design our cost function which is minimized to obtain better alignment after the global registration, thus producing accurate image stitching. Experimental results on various open datasets demonstrate that our proposed method outperforms state-of-the-art image stitching algorithms.

Autonomous Micro Aerial Vehicles (MAVs) gained tremendous attention in recent years. Autonomous flight in indoor requires a dense depth map for navigable space detection which is the fundamental component for autonomous navigation. In this paper, we address the problem of reconstructing dense depth while a drone is hovering (small camera motion) in indoor scenes using already estimated cameras and sparse point cloud obtained from a vSLAM. We start by segmenting the scene based on sudden depth variation using sparse 3D points and introduce a patch-based local plane fitting via energy minimization which combines photometric consistency and co-planarity with neighbouring patches. The method also combines a plane sweep technique for image segments having almost no sparse point for initialization. Experiments show, the proposed method produces better depth for indoor in artificial lighting condition, low-textured environment compared to earlier literature in small motion.

Parallel recursive computations incorporating the unavoidable and significant parallel computing overheads, encompassing a wide variety of applications, can be modeled as T(n) = left{ {mathop {min }limits_{0 le r le n}^{t_{(),} } } right.left{ {max left{ {T(n - r),T(r) + k(r)} right} + mathop {mathop {lambda (n,r)}limits_{otherwise} }limits^{forn le n_{(),} } } right} where k(r) and X(n,r) represent the partition and recombination overheads respectively. The optimal partition size (solution to r of the above minmax recurrence relation) is nontrivial and is very different from the n/2 value conventionally used. Using the optimal partitions at every stage of the recursion enhances the performance greatly. In this paper we solve a challenging case of our parallel recursive model where the overhead functions are problem-dependent.

Field programmable gate arrays (FPGAs) provide an innovative and flexible platform to implement and evaluate digital signal processing (DSP) applications. A CAD design methodology which is used to implement DSP algorithms is presented. An introduction is given to the various issues involved in the multi-chip partitioning of large DSP implementations, and approaches towards efficient auto-partitioners are also discussed in detail. The design and implementation of an 8-point 1D discrete cosine transform (DCT) and its inverse (IDCT) on a processor with FPGAs is presented in this paper, as an illustrative example of a typical DSP algorithm. The processor uses 16-bit precision, is implemented on six Xilinx 4000 type FPGAs and operates at 40 MHz.>

An analysis and a simulation of a type of multistage interconnection network, a banyan network based on buffers of various sizes connected at the input link of each node are described. A generalized model for estimating performance indices is developed. It is demonstrated that while buffering produces a considerable improvement in performance, optimum buffer size depends on the average input load. Analytic estimates are substantiated by simulation results.>