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Jong-Ee Oh

dblp:50/5224 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2007
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
1 paper
Coding theory · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Coding theory › error-correcting codes
space-time codes
0.012003
Space-time codes with full antenna diversity using weighted nonbinary repeat-accumulate codes · IEEE Trans. Commun. 2003
Coding theory › error-correcting codes › LDPC codes
repeat-accumulate codes
0.012003
Space-time codes with full antenna diversity using weighted nonbinary repeat-accumulate codes · IEEE Trans. Commun. 2003

Methods — techniques the papers use, named apart from their topics

weighted nonbinary codes · 0.0message-passing decoding · 0.0
YearPublicationVenuePosition
2007 Row-Splitting Design of Low-Density Parity-Check Codes for Gbps Transmission
abstract
In this paper, we propose a design methodology of low-density parity check (LDPC) code for very high speed transmission. To support various code rates with reasonable hardware and, possibly, the type-II hybrid automatic repeat request (HARQ), a row-splitting/combining method is employed in conjunction with shortening. In row-splitting approach, a parity check matrix of a high rate mother LDPC code, saying rate 5/6, is designed first and then successively row-split the mother matrix to obtain lower rate codes. Shortening provides us another degree of freedom for rate and frame length flexibility for concatenation with MIMO system. The code performance is investigated in terms of frame error rate and compared with those of the LDPC code proposed in IEEE 802.16e standard.
Jong-Ee Oh, Minho Cheong, Cheol-Hui Ryu, Seokhyun Yoon, Sok-Kyu Lee
VTC Fall1
2007 A Hardware Efficient LDPC Encoding Scheme for Exploiting Decoder Structure and Resources
abstract
Previously, there has been no report on implementation effort to integrate LDPC encoder and decoder into a single hardware. In this paper, we propose a simple yet low complex systematic LDPC encoding method for class of quasi-cyclic low-density parity-check (QC-LDPC) codes to let LDPC encoder acquire an interchangeable structure, exploited in the decoder. With the proposed encoding scheme, implementation of the proposed encoder becomes much more hardware efficient than having a separate hardware due to LDPC encoder and decoder resource sharing. Moreover, the overall computational complexity of the proposed encoding scheme is lower than the well-known Richardson's efficient encoding scheme (A.T.J. Richardson and R.L. Urbanke, 2001).
Chanho Yoon, Jong-Ee Oh, Minho Cheong, Sok-Kyu Lee
VTC Spring2
2003 Space-time codes with full antenna diversity using weighted nonbinary repeat-accumulate codes
abstract
Like turbo codes, repeat-accumulate codes have remarkably good performance when r/spl ges/3, where r is the number of repetition times. We present space-time codes with full antenna diversity using "weighted" nonbinary repeat-accumulate codes. Compared with the space-time turbo codes of Y. Liu et al. (see IEEE J. Select. Areas Commun., vol.19, p.969-80, 2001) and of H. Su and E. Geraniotis (see ibid., vol.49, p.47-57, 2001), the main advantage of this new scheme is to construct space-time codes with full diversity for any m/spl les/r and any length of frame without searching for interleavers, where m is the number of transmit antennas. These space-time codes have rate m/r and, so, have full rate when m=r. Furthermore, they have an efficient decoding based on the message passing algorithm.
Jong-Ee Oh, Kyeongcheol Yang
IEEE Trans. Commun.1