The selection of a single responding word out of several responses to an associative search is a major and frequent function of associative memories (AM's) and processors (AP's). To select a responder, an AM must be able to generate a signal that is one for the desired word and zero for all others. This paper describes two families of circuits for doing this. The first family, called the preliminary circuits, is based on a generalization of a previously published circuit. The second family, called the optimum circuits, is derived from the first, and the circuits are optimum in the sense that they are the fastest circuits the techniques of this paper can give. An analysis of the settling time (in gate delays) required for the operation of the optimum circuits shows that, while they lack some of the symmetry of the preliminary circuits, they are the fastest practical circuits yet proposed for multiple-response resolution.