Pascal Véron

dblp:51/4353 · DBLP profile ↗
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16ranked-venue papers
4as first author
6since 2021 · last 2026
0000-0001-7610-6870ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 9 · 3 first-author · 3 since 2021Theory of computation · 6 · 1 first-author · 2 since 2021Systems, architecture and hardware · 2 · 1 since 2021Software engineering, systems software and programming languages · 1
YearPublicationVenuePosition
2026 Equality Tests in the Polynomial Modular Number System
Nicolas Méloni, François Palma, Pascal Véron
WAIFI3
2025 Multi-precision PMNS with CIOS Reduction
Nicolas Méloni, François Palma, Pascal Véron
SAC3
2024 Modular Multiplication in the AMNS Representation: Hardware Implementation
Louis Noyez, Nadia El Mrabet, Olivier Potin, Pascal Véron
SAC (2)4
2024 Montgomery Multiplication Scalable Systolic Designs Optimized for DSP48E2
abstract
This article describes an extensive study of the use of DSP48E2 Slices in Ultrascale FPGAs to design hardware versions of the Montgomery Multiplication algorithm for the hardware acceleration of modular multiplications. Our fully scalable systolic architectures result in parallelized, DSP48E2-optimized scheduling of operations analogous to the FIOS block variant of the Montgomery Multiplication. We explore the impacts of different pipelining strategies within DSP blocks, scheduling of operations, processing element configurations, global design structures and their tradeoffs in terms of performance and resource costs. We discuss the application of our methodology to multiple types of DSP primitives. We provide ready-to-use fast, efficient, and fully parametrizable designs, which can adapt to a wide range of requirements and applications. Implementations are scalable to any operand width. Our most efficient designs can perform 128, 256, 512, 1024, 2048, and 4096 bits Montgomery modular multiplications in 0.0992 μs, 0.2032 μs, 0.3952 μs, 0.7792μs, 1.550 μs, and 3.099 μs using 4, 6, 11, 21, 41, and 82 DSP blocks, respectively.
Louis Noyez, Nadia El Mrabet, Olivier Potin, Pascal Véron
ACM Trans. Reconfigurable Technol. Syst.4
2022 PMNS for efficient arithmetic and small memory cost
abstract
Presents the front cover, title page, cover page, or splash screen of the proceedings record.
Fangan-Yssouf Dosso, Jean-Marc Robert 0003, Pascal Véron
ARITH3
2021 Compact Variable-base ECC Scalar Multiplication using Euclidean Addition Chains
abstract
International audience
Fabien Herbaut, Nicolas Méloni, Pascal Véron
SECRYPT3
2019 Randomization of Arithmetic Over Polynomial Modular Number System
abstract
The Polynomial Modular Number System (PMNS) is an integer number system designed to speed up arithmetic operations modulo a prime p. Such a system is defined by a tuple B = (p, n, γ, ρ, E) where E ε Z[X] and E(γ) = 0 mod p. In a PMNS, an element a of Z/pZ is represented by a polynomial A such that: A(γ) = a mod p, deg A <; n ||A||∞ <; p. In [6], the authors mentioned that PMNS can be highly redundant but they didn't really take advantage of this possibility. In this paper we use, for the first time, the redundancy of PMNS to protect algorithms against Side Channel Attacks (SCA). More precisely, we focus on elliptic curve cryptography. We show how to randomize the modular multiplication in order to be safe against existing SCA and we demonstrate the resistance of our construction. We describe the generation of a PMNS while guaranteeing, for all elements of Z/pZ, the minimum number of distinct representations we want. We also show how to reach all these representations.
Laurent-Stéphane Didier, Fangan-Yssouf Dosso, Nadia El Mrabet, Jérémy Marrez, Pascal Véron
ARITH5
2017 Cache timing attacks countermeasures and error detection in Euclidean addition chains based scalar multiplication algorithm for elliptic curves
abstract
In this paper, we improved the method proposed in [1] which was designed to detect errors in the elliptic curve scalar multiplication algorithm (ECSM). The algorithm we propose is SPA-secure and safe against recent data and instruction cache timing attacks.
Fangan-Yssouf Dosso, Pascal Véron
IOLTS2
2016 Extended security arguments for signature schemes
Özgür Dagdelen, David Galindo, Pascal Véron, Sidi Mohamed El Yousfi Alaoui, Pierre-Louis Cayrel
Des. Codes Cryptogr.3
2012 An Improved Threshold Ring Signature Scheme Based on Error Correcting Codes
Pierre-Louis Cayrel, Sidi Mohamed El Yousfi Alaoui, Gerhard Hoffmann, Pascal Véron
WAIFI4
2010 A Public Key Cryptosystem Based upon Euclidean Addition Chains
Fabien Herbaut, Pascal Véron
SETA2
2005 On the Non-linearity of Power Functions
Philippe Langevin, Pascal Véron
Des. Codes Cryptogr.2
2005 Proof of Conjectures on the True Dimension of Some Binary Goppa Codes
Pascal Véron
Des. Codes Cryptogr.1
2001 True Dimension of Some Binary Quadratic Trace Goppa Codes
Pascal Véron
Des. Codes Cryptogr.1
1998 Goppa Codes and Trace Operator
abstract
We study Goppa codes, /spl Gamma/(L,g), defined by the polynomial g(z)=a(z)TrF/sub p/ms:F/sub p/s(b(z)). It is shown that the dimension of these codes never reaches the general, well-known, bound for Goppa codes. New bounds are proposed depending on the value of m and p. Furthermore, we prove that when p=2 these codes have only even weights.
Pascal Véron
IEEE Trans. Inf. Theory1
1995 Cryptanalysis of Harari's Identification Scheme
Pascal Véron
IMACC1