Autonomous mobile robots are increasingly deployed in various application domains, often operating in environments with uncertain conditions. Such robots rely on the state and performance assessments at runtime to autonomously control the robot functionality. However, uncertainty can significantly impact the robot sensors and actuators making it challenging to assess the robot state and quantify its performance reliably. This paper proposes a digital twin (DT) asset for the runtime estimation and validation of state and performance for a mobile autonomous robot "Turtlebot3" (TB3) operating under uncertainties, namely Lidar sensor obstruction and unknown floor friction and density. The proposed DT setup enables real-time state synthesis post-uncertainty, so that to estimate the performance and validate it using TeSSLa monitors, and compute mitigation actions. To maintain the robot autonomy, our DT intervenes only when an uncertainty is identified. The experimental results demonstrate that our DT enables to eliminate 70% of the related uncertainty while it mostly maintains the real-time synchronization with the physical TB3 robot operating a frequency of 0.2s.

In recent years, FPGA platforms have shown significant potential for accelerating artificial intelligence (AI) applications, particularly in Embedded AI. While various studies have explored adaptive AI deployment on FPGAs, there remains a gap in methodologies fully integrating software adaptability with FPGA hardware reconfigurability. This article presents a novel end-to-end co-design methodology for deploying adaptable and scalable Convolutional Neural Networks (CNNs) on FPGA platforms. The framework enhances computational performance and reduces latency by dynamically modifying hardware acceleration units by combining CNN architecture adaptability with dynamic partial reconfiguration of FPGA hardware. The proposed methodology enables automated synthesis and runtime customization of both hardware accelerators and CNN architectures, eliminating the need for iterative synthesis. This approach has been implemented and tested on a Xilinx XC7020 FPGA board for a CNN-based image classifier, achieving superior computation performance (0.68s/image) and accuracy (97%) compared to state-of-the-art alternatives.

As autonomous robots increasingly navigate complex and unpredictable environments, ensuring their reliable behavior under uncertainty becomes a critical challenge. This paper introduces a Digital Twin as a service approach to enable runtime monitoring and verification of an autonomous mobile robot and mitigate the impact posed by uncertainty in the deployment environment. The safety and performance properties are specified and synthesized as runtime monitors using TeSSLa. The integration of the executable digital twin, via the MQTT protocol, enables continuous monitoring and validation of the robot’s behavior in real-time. We explore different sources of uncertainties and analyze their impact on the robot safety and performance. Equipped with high computation resources, the cloud-located digital twin serves as a watch-dog model to estimate the actual state, checking the consistency of the robot’s actuations and approving or denying such actuations depending on the safety and performance properties. The experimental analysis demonstrated high efficiency of the proposed approach in ensuring the reliability and robustness of the autonomous robot behavior in uncertain environments by securing high alignment between the actual and expected speeds where the difference is reduced by up to 41% compared to the default robot navigation control.

Digital twin technology offers a sophisticated and flexible methodology to design high fidelity models of cyber-physical systems for simulation, optimization, formal verification and validation purposes. This has made such a technology a nascent process being currently adopted in many industries. This paper introduces a digital twin setup for safety-aware performance optimization of a cyber-physical system (Energy Buck converter EBC). This is achieved by designing a high fidelity digital twin model of the Buck converter through synchronization of the model with the physical system, namely calibration. The behavior model is originally built in MATLAB to identify potential runtime optimization patterns using a genetic algorithm. Such a model is translated to a Uppaal model to perform formal verification of the safety properties. The behavior patterns from optimization are provided as inputs to the verification engine for approval, where only valid and feasible patterns are pushed into the actual control loop of EBC. The proposed setup has led to maintain the system safety while optimizing the performance and reducing the output errors.

Zero-emission ships (ZE-ships) concept has been introduced as a promising solution in reducing the greenhouse gases (GHG) emission in marine shipping industry. Among different solutions, Fuel cells (FCs) are introduced as one of the most efficient technologies for providing the propulsion force of the ZE-ships. Energy storage systems (ESSs) are also used as auxiliary resource to cover the fast dynamics of the loads the the FCs are not able to supply. Design and operation problem of ZE-ships has been investigated in the literature from different viewpoints. This paper provides a survey on available studies in the field of cost effective energy management of FC/ESS based ZE-ships. To this end, first, different studies in the literature are categorized from the viewpoint of energy management strategies (EMSs) and discussed Then other categories of the works such as auxiliary energy resources, problem objectives, and simulation methods are also provided.

Increasing concerns related to fossil fuels have led to the introducing the concept of emission-free ships (EF-Ships) in marine industry. One of the well-known combinations of green energy resources in EF-Ships is the hybridization of fuel cells (FCs) with energy storage systems (ESSs) and cold-ironing (CI). Due to the high investment cost of FCs and ESSs, the aging factors of these resources should be considered in the energy management of EF-Ships. This article proposes a nonlinear model for optimal energy management of EF-Ships with hybrid FC/ESS/CI as energy resources considering the aging factors of the FCs and ESSs. Total operation costs and aging factors of FCs and ESSs are chosen as problem objectives. Moreover, a stochastic model predictive control method is adapted to the model to consider the uncertainties during the optimization horizon. The proposed model is applied to an actual case test system and the results are discussed.

In this paper, we propose a safety-driven cost effective scheduling controller to arbitrate and operate the energy resources of a maritime hybrid energy application. The proposed control algorithm enables efficient energy management to dynamically schedule the energy sources to supply the realtime power requests so that 1) we maintain the system safety by not overloading or heating up an energy source; 2) reduce the operation cost by considering the cheapest energy source in a real-time manner. The efficiency and safety of our scheduling algorithm have been examined using Uppaal model checker. The experiment outputs show that our controller maintains the system safety and guarantees the lowest operation cost.

Fog computing has emerged as a complementary solution to address the issues faced in cloud computing. While fog computing allows us to better handle time/delay-sensitive Internet of Everything (IoE) applications (e.g. smart grids and adversarial environment), there are a number of operational challenges. For example, the resource-constrained nature of fog-nodes and heterogeneity of IoE jobs complicate efforts to schedule tasks efficiently. Thus, to better streamline time/delay-sensitive varied IoE requests, the authors contributes by introducing a smart layer between IoE devices and fog nodes to incorporate an intelligent and adaptive learning based task scheduling technique. Specifically, our approach analyzes the various service type of IoE requests and presents an optimal strategy to allocate the most suitable available fog resource accordingly. We rigorously evaluate the performance of the proposed approach using simulation, as well as its correctness using formal verification. The evaluation findings are promising, both in terms of energy consumption and Quality of Service (QoS).

Different scheduling algorithms for mixed criticality systems have been recently proposed. The common denominator of these algorithms is to discard low critical tasks whenever high critical tasks are in lack of computation resources. This is achieved upon a switch of the scheduling mode from Normal to Critical. We distinguish two main categories of the algorithms: system-level mode switch and task-level mode switch. System-level mode algorithms allow low criticality (LC) tasks to execute only in normal mode. Task-level mode switch algorithms enable to switch the mode of an individual high criticality task (HC), from low (LO) to high (HI), to obtain priority over all LC tasks. This paper investigates an online scheduling algorithm for mixed-criticality systems that supports dynamic mode switches for both task level and system level. When a HC task job overruns its LC budget, then only that particular job is switched to HI mode. If the job cannot be accommodated, then the system switches to Critical mode. To accommodate for resource availability of the HC jobs, the LC tasks are degraded by stretching their periods until the Critical mode exhibiting job complete its execution. The stretching will be carried out until the resource availability is met. We have mechanized and implemented the proposed algorithm using Uppaal. To study the efficiency of our scheduling algorithm, we examine a case study and compare our results to the state of the art algorithms.

With the recent development of power electronic equipment in marine industry, the deployment of pulse power loads in the Shipboard power systems (SPSs) is constantly expanding. During the usage of a pulse power load (PPL), a huge amount of energy is consumed within a short period of time which brings new threats to the reliability and stability of the SPSs. Technically, the negative effects of PPLs to SPSs can be alleviated by powering specialized energy storage systems (ESSs). On the other hand, the challenges of the PPL accommodation on SPSs become more intensified when the systems are coupled with the communication networks. In this paper, an intelligent controller is developed for counteracting the effect of PPLs problem on a Cyber-Physical Shipboard Microgrid (CPSMG). This study presents an optimal general type-2 fractional order fuzzy P + fuzzy I + fuzzy D (GT2FOFP+FI+FD) controller for the secondary load frequency control (LFC) of the CPSMG. In order to boost the output performance of the LFC, an enhanced JAYA algorithm (EJAYA) is utilized for the online setting of the GT2FO-FP+FI+FD controller coefficients. Finally, a real-time CPSMG hardware-in-the-loop (HIL) is adopted to investigate the applicability of the suggested scheme in dealing with the impacts of PPLs and communication degradations from a systemic perspective.

Industrial control systems are moving from monolithic to distributed and cloud-connected architectures, which increases system complexity and vulnerability, thus complicates security analysis. When exhaustive verification accounts for this complexity the state space being sought grows drastically as the system model evolves and more details are considered. Eventually this may lead to state space explosion, which makes exhaustive verification infeasible. To address this, we use VDM-SL's combinatorial testing feature to generate security attacks that are executed against the model to verify whether the system has the desired security properties. We demonstrate our approach using a cloud-connected industrial control system that is responsible for performing safety-critical tasks and handling client requests sent to the control network. Although the approach is not exhaustive it enables verification of mitigation strategies for a large number of attacks and complex systems within reasonable time.

Architecture space exploration of multicore systems has been studied for more than a decade now. The main exploration factor was the workload distribution in a sense that all processing elements run fairly similar workloads, and none of the processes misses its real-time constraints. For safety critical systems, assigning the software functions to real-time tasks of the target operating system is a crucial task as it is constrained with a set of different criticality, architectural and time-related constraints. Finding a suitable architecture configuration involves many important design decisions that have a strong impact on the system safety and performance. With the increasing complexity and scale of today's systems and the large number of possible architecture configurations, identifying the efficient architectures while satisfying different (potentially conflicting) criteria becomes tedious and error-prone for designers. In this paper, we propose an automated method using multi-objective criteria to explore the architecture of multicore safety critical systems. Our method relies on a constellation of analysis techniques where we consider architectural, criticality and time requirements (schedulability). We have implemented two Matlab algorithms to perform the architecture exploration, while the final candidate configurations are analyzed for schedulability using the Uppaal model checker.

We present a compositional framework for the specification and analysis of hierarchical scheduling systems (HSS). Firstly we provide a generic formal model, which can be used to describe any type of scheduling system. The concept of Job automata is introduced in order to model job instantiation patterns. We model the interaction between different levels in the hierarchy through the use of state-based resource models. Our notion of resource model is general enough to capture multi-core architectures, preemptiveness and non-determinism.

Nowadays, multicore platforms are being widely used for the deployment of embedded systems due to their potential in terms of processing capacity. However, the resulting interleaving and memory interference make real-time guarantees of safety critical systems hard to be delivered. Beside to safety requirements, energy consumption represents a strong constraint for the deployment of such systems as they operate on energy-limited sources. Dynamic Voltage and Frequency Scaling (DVFS) was introduced as a technology to reduce the energy consumption of systems by tuning the frequency of processing cores according to the workload. One way of improving schedulability could be by running all cores with maximum frequency. Nevertheless, it has been proved in the literature that this solution is not optimal because it drains the battery energy and leads to eternal bottleneck as the number of memory requests increases linearly with the cores frequency. In this paper, we introduce a framework for fine grained specification and formal analysis of the schedulability and performance of DVFS-multicore systems having a hierarchy of shared memories. We design a collaborative scheduling algorithm to reduce the energy consumption and improve cores utilization. Our collaborative scheduling technique drives the scheduling of a core according to the adopted policy and the resulting memory interference. To that end, our framework provides the ability to run other ready tasks, when the current running tasks fall in a dense memory interference queue, rather than stalling on the memory interference.

Today's embedded systems demand increasing computing power to accommodate the ever-growing software functionality. Automotive and avionic systems aim to leverage the high performance capabilities of multicore platforms, but are faced with challenges with respect to temporal predictability. Multicore designers have achieved much progress on improvement of memory-dependent performance in caching systems and shared memories in general. However, having applications running simultaneously and requesting the access to the shared memories concurrently leads to interference. The performance unpredictability resulting from interference at any shared memory level may lead to violation of the timing properties in safety-critical real-time systems. In this paper, we introduce a formal analysis framework for the schedulability and memory interference of multicore systems with shared caches and DRAM. We build a multicore system model with a fine grained application behavior given in terms of periodic preemptible tasks, described with explicit read and write access numbers for shared caches and DRAM. We also provide a method to analyze and recommend candidates for task-to-core reallocation with the goal to find schedulable configurations if a given system is not schedulable. Our model-based framework is realized using Uppaal and has been used to analyze a case study.

Despite attractiveness of multicore processors for embedded systems, the potential performance gains need to be studied in the context of real-time task scheduling and memory interference. This paper explores performance-aware schedula-bility of multicore systems by evaluating the performance when changing scheduling policies (as design parameters). The modelbased framework we build enables analyzing the performance of multicore time-critical systems using processor-centric and memory-centric scheduling policies. The system architecture we consider consists of a set of cores with a local cache and sharing the cache level L2 and main memory (DRAM). The metrics we use to compare the performance achieved by different configurations of a system are: 1) utilization of the cores; and 2) the maximum delay per access request to shared cache and DRAM. Our framework, realized using UPPAAL, can be viewed as an engineering tool to be used during design stages to identify the scheduling policies that provide better performance for a given system while maintaining system schedulability. As a proof of concept, we analyze and compare 2 different cases studies.

Modern automotive software components are often first developed by different suppliers and then integrated under limited resources by a manufacturer. The integration of software components under various resource configurations is prone to timing errors because the components are resources independently designed by the supplier and viewed by the manufacturer as black boxes during the integration stage, so that imposing resource constraints/requirements on their behavior is a challenge. This paper introduces an engineering awareness environment for the analysis of automotive systems with respect to two perspectives: 1) time-aware design models that correspond to the supplier perspective; and 2) resource-aware design models imposed by the manufacturer during integration. To this end, first we propose two timed behavioral models, a time-constrained model (TcM) and a resource-constrained model (RcM) that are extended from a functional model (FM). A timing analysis of applications can hence be conducted incrementally by adopting the separation of concerns principle coming from the model-driven architectures (MDAs). Second, given a basic application component description of AUTomotive Open System Architecture with timing properties, we specify how to define the behavior of the basic components as process terms using a process algebra, algebra of communicating shared resources with value passing (ACSR-VP), in order to exploit the description capability of the language for both timing aspects and resource-constrained aspects of a system. As a result, a timed behavioral model of a system can be seamlessly refined by various resource configurations, and both platform-independent and platform-dependent timing properties of real-time systems can be analyzed in a consistent and efficient manner.

The analysis of probabilistic schedulability explores all possible combinations of the probabilities of task attributes, which can easily lead to exponential computation time [24]. In this paper, we present a flexible schedulability analysis framework for periodic and sporadic tasks having probabilistic attributes where the computation time scales linearly in the size of analyzed systems. The framework is given in terms of a set of Parameterized Stopwatch Automata (PSA) models, which leads to a large degree of flexibility. Probability distributions for response time are generated using statistical model checking (UPPAAL SMC) while the overall schedulability can be checked using symbolic model checking (UPPAAL). We also define PoMD (percentage of missed deadlines) as a measure of the probabilistic schedulability of systems. To evaluate our approach, we compare the time used for computing response times and the analysis results using similar task models to that of a related analytical approach.

This paper presents a new process algebra, called PACOR, for real-time systems which deals with resource constrained timed behavior as an improved version of the ACSR algebra. We define PACOR as a Process Algebra of Communicating Resources which allows to express preemptiveness, urgent ness and resource usage over a dense-time model. The semantic interpretation of PACOR is defined in the form of a timed transition system expressing the timed behavior and dynamic creation of processes. We define a translation of PACOR systems to Parameterized Stopwatch Automata (PSA). The translation preserves the original semantics of PACOR and enables the verification of PACOR systems using symbolic model checking in UPPAAL and statistical model checking UPPAAL SMC. Finally we provide an example to illustrate system specification in PACOR, translation and verification.

We present the concept of degree of schedulability for mixed-criticality scheduling systems. This concept is given in terms of the two factors 1) Percentage of Missed Deadlines (PoMD), and 2) Degradation of the Quality of Service (DoQoS). The novel aspect is that we consider task arrival patterns that follow user-defined continuous probability distributions. We determine the degree of schedulability of a single scheduling component which can contain both periodic and sporadic tasks using statistical model checking in the form of UPPAAL SMC. We support uniform, exponential, Gaussian and any user-defined probability distribution.

High-level requirements of real-time systems like as time constraints, communications and execution schedulability make the verification of real-time models arduous, where a system is the interaction of a possibly unbounded set of components. Priorities have been introduced to resolve execution conflicts, and by that, prevent the combinatorial explosion of state space. In this paper, we are interested in the composition and refinement of timed systems by considering static and dynamic priorities. Firstly, we propose a revised definition of the product of extended timed transition systems with static and dynamic priorities associated to individual transitions. Afterwards, we study the(compositional) refinement of compound extended timed systems. Without sacrificing compositionality, we instantiate this framework for the case of UPPAAL networks of timed automata with static priority Committed ness, dynamic priority between channels and priority between processes. Moreover, we show how to associate an Extended Timed Transition System (ETTS) to timed automata (TA), where an unique generalized dynamic priority system of ETTS is derived from both dynamic priority orders: priority between channels and priority between processes.