VLDB 2026 Research / reviewers in the wild / expert
Richard W. Heuft
dblp:52/2883
· DBLP profile ↗
3ranked-venue papers
2as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 54% Hardware accelerators and domain-specific architectures · 33% Performance modeling and evaluation · 13% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% | |
| Computer graphics and multimedia
1 paper |
Rendering · 50% Geometric modeling and processing · 50% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
dependence analysis |
0.0 | 1 | 1982 | Improved Time and Parallel Processor Bounds for Fortran-Like Loops · IEEE Trans. Computers 1982 |
Compilers and program optimization
parallelization |
0.0 | 1 | 1982 | Improved Time and Parallel Processor Bounds for Fortran-Like Loops · IEEE Trans. Computers 1982 |
Parallel and multicore computing › parallel scheduling
parallel loop scheduling |
0.0 | 1 | 1982 | Improved Time and Parallel Processor Bounds for Fortran-Like Loops · IEEE Trans. Computers 1982 |
Hardware accelerators and domain-specific architectures › machine learning accelerator › neural network accelerator › convolution acceleration
convolution accelerator |
0.0 | 1 | 1980 | Convolution Computer · IEEE Trans. Computers 1980 |
Geometric modeling and processing › computational geometry
polygon decomposition |
0.0 | 1 | 1979 | An Area Shading Graphics Display Systems · IEEE Trans. Computers 1979 |
Rendering
raster graphics |
0.0 | 1 | 1979 | An Area Shading Graphics Display Systems · IEEE Trans. Computers 1979 |
Parallel and multicore computing › parallel architecture
parallel processor |
0.0 | 1 | 1980 | Convolution Computer · IEEE Trans. Computers 1980 |
Methods — techniques the papers use, named apart from their topics
static analysis · 0.0dynamic analysis · 0.0pipelining · 0.0discrete convolution · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | Improved Time and Parallel Processor Bounds for Fortran-Like LoopsabstractDynamic characteristics of program execution must be studied in order to calculate meaningful time and parallel processor bounds. The paper entitled "Time and Parallel Processor Bounds for Fortran-Like Loops" [1] studies only the static interaction between statements within a program to arrive at these bounds. Consequently, very loose bounds are obtained for certain programs. Improved estimates of time and processor bounds are provided for two of the example programs presented in the above-mentioned paper. These estimates are based on an expression of the relationship between operations which calculate values and operations which later use those values as operands. Richard W. Heuft, Warren D. Little |
IEEE Trans. Computers | 1 |
| 1980 | Convolution ComputerabstractA special purpose computer is described to evaluate the discrete convolution of two sequences of numbers. This computer abandons the traditional model of convolution as a series of inner products which, for input sequences of length n, requires n multipliers and (n − 1) adders to complete a convolution calculation in (2n − 1) time steps. Instead, it is shown that by reorganizing the algorithm, n interconnected processing units are able to evaluate a convolution in n time steps. Each processing unit consists of a multiplier, an adder, and the necessary buffers. In addition to providing increased throughput, the proposed organization results in a highly modular structure with a well defined interconnection pattern. Richard W. Heuft, Warren D. Little |
IEEE Trans. Computers | 1 |
| 1979 | An Area Shading Graphics Display SystemsabstractA computer graphics display system for rapidly shading areas on a raster scan screen is described. With the system, the host computer provides the display controller with the parameters of a set of component trapezoids which cover the area to be shaded. The paper gives an algorithm for use in the host to decompose an arbitrary polygon into component trapezoids and it describes a microcomputer based controller to shade the trapezoids. Warren D. Little, Richard W. Heuft |
IEEE Trans. Computers | 2 |