A novel scheme for utilizing the regular structure of three neighborhood additive cellular automata (CAs) for pseudoexhaustive test pattern generation is introduced. The vector space generated by a CA can be decomposed into several cyclic subspaces. A cycle corresponding to an m-dimensional cyclic subspace has been shown to pseudoexhaustively test an n-input circuit (n>or=m). Such a cycle is shown to supply a (m-1) bit exhaustive pattern including the all-zeros (m-1)-tuple. Schemes have been reported specifying how one or more subsets of (m-1) cell positions of an n-cell CA can be identified to generate exhaustive patterns in an m-dimensional cyclic subspace.>