The developing semiconductor technology enables the reconfigurable hardware such as FPGA. Distributed reconfigurable system is a FPGA-based hardware accelerated system with network. Applications can be accelerated as hardware module by FPGA in a distributed system. There are few works about application mapping on distributed reconfigurable system. In this paper an application mapping scheme for reconfigurable hardware accelerated distributed system is introduced. By extending the link state routing algorithm, this scheme can maintain the network map with low overhead to ensure the flexibility of the algorithm. The LEFM-NH algorithm proposed in this paper analyzes the current network status and the current application task graphs, and then finds appropriate hosts to map tasks to reduce the average network latency. This paper uses NetFPGA as the reference platform. The LEFM-NH algorithm can reduce the average network latency by 64% compared with simple random mapping algorithm. Experimental results show that the LEFM-NH algorithm of our scheme has good scalability and its execution time has a linear growth with task number.

The Intel Cup Undergraduate Embedded System Electronic Design Contest is an embedded system design invitational contest in China. This contest is held every two years since 2002. The contest focuses on the embedded system design and implementation. And it gives undergraduates a chance to show their creativity and learn teamwork. The influence of the contest is keeping increasing. Now it is an international invitational contest. And some universities from the countries which are advanced in computing begin to take part in the contest. In this paper we describe the experiences in such a contest for embedded system.

In order to cope with the energy challenge emerging with the process of parallelism in embedded storing device, this paper focuses on the static code restructuring of nested loop array accessing related to storing device. Departing the running time of different devices can extend the duration time when it is in low- power state. Experiment shows that power-aware code restructuring can effectively reduce state switching times and extra power wasted. Static method described in this paper can achieve up to 12% power reduction if it cooperates with proper dynamic method.

A polarization-based method for water hazards detection is presented. The concept of polarization is introduced to computer vision to detect water hazards for autonomous off-road navigation. This method is based on the physical principle that the light reflected from water surface is partial linearly polarized and the polarization phases of them are more similar than those from the scenes around. Water hazards can be detected by comparison of polarization degree and similarity of the polarization phases. Experiments show that the method has good performance in water detection in complex natural backgrounds, especially when there is vegetation reflected in the water. This method has significant complementary advantages with respect to existing techniques, is computationally efficient, and can be easily implemented with existing imaging technology.

Nowadays, large storage is becoming an important feature of mobile embedded systems as their media functions are getting increasingly powerful and popular. However, no low power cost memory can provide sufficient capacity at low cost. And much higher power consumption of large capacity storage devices such as Microdrive is hard to be accepted. In this paper, we propose a logical storage layer over hybrid storage device composed of flash memory and Microdrive to provide file systems to embedded systems with minimal impact on battery runtime and power consumption. The result shows that the architecture can provide 32 times as much capacity with 10-15% battery runtime impact.