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Hoi Wai Choi

dblp:52/7841 · DBLP profile ↗
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2ranked-venue papers
0as first author
1since 2021 · last 2025
0000-0002-7192-5233ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
electromagnetic simulation
0.112009
Robust Simulation Methodology for Surface-Roughness Loss in Interconnect and Package Modelings · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2009
Electronic design automation
interconnect and package modeling
0.112009
Robust Simulation Methodology for Surface-Roughness Loss in Interconnect and Package Modelings · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2009

Methods — techniques the papers use, named apart from their topics

spectral stochastic collocation · 0.1scalar-wave modeling · 0.1
YearPublicationVenuePosition
2025 Extended-chip-on-board (e-COB) heterogeneous integration of LEDs with LED drivers
abstract
In a conventional chip-on-board (COB) LED circuit, multiple LED dies are mounted on a common platform to achieve dense LED integration, improved heat-sinking, and lower production costs. Nevertheless, the COB LED is still driven by a conventional power supply. In this work, the extended-chip-on-board (e-COB) LED lighting system is proposed, whereby apart from the LEDs, the electronic driving circuit is also integrated into the same platform. Integration with both the linear regulated power supply (LRPS) and switch-mode power supply (SMPS) are explored. The result of such integration is a reduction in circuit footprint, which is more pronounced in the LRPS systems than the SMPS system due to its necessity for bulky inductors. For the LRPS systems, a fourfold reduction in footprint has been demonstrated, for an e-COB circuit comprising 10 LEDs in an annular arrangement. The e-COB system also operates cooler by ∼ 12 . 4 % at the driving voltage of 5 V, due to the direct thermal pathway between the heat source (LED, IC, etc.) to the heat sink (PCB), without having to route through the package. The e-COB packaging approach represents a solution for taking LED lighting system efficiency and compactness to the next level, which can readily be extended to non-lighting systems, especially where electrical and thermal efficiency is valued.
Yuk Fai Cheung, Hoi Wai Choi
Integr.3
2009 Robust Simulation Methodology for Surface-Roughness Loss in Interconnect and Package Modelings
abstract
In multigigahertz integrated-circuit design, the extra energy loss caused by conductor surface roughness in metallic interconnects and packagings is more evident than ever before and demands explicit consideration for accurate prediction of signal integrity and energy consumption. Existing techniques based on analytical approximation, despite simple formulations, suffer from restrictive valid ranges, namely, either small or large roughness/frequencies. In this paper, we propose a robust and efficient numerical-simulation methodology applicable to evaluating general surface roughness, described by parameterized stochastic processes, across a wide frequency band. Traditional computation-intensive electromagnetic simulation is avoided via a tailored scalar-wave modeling to capture the power loss due to surface roughness. The spectral stochastic collocation method is applied to construct the complete statistical model. Comparisons with full wave simulation as well as existing methods in their respective valid ranges then verify the effectiveness of the proposed approach.
Quan Chen 0007, Hoi Wai Choi, Ngai Wong 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2