VLDB 2026 Research / reviewers in the wild / expert
Stephen R. Demba
dblp:54/3266
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1990
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
fault simulation |
0.0 | 1 | 1990 | Experiences with concurrent fault simulation of diagnostic programs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1990 | Experiences with concurrent fault simulation of diagnostic programs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990 |
Electronic design automation › hardware verification and test
system-level testing |
0.0 | 1 | 1990 | Experiences with concurrent fault simulation of diagnostic programs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990 |
Methods — techniques the papers use, named apart from their topics
statistical observation · 0.0concurrent fault simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1990 | Experiences with concurrent fault simulation of diagnostic programsabstractA methodology is presented for fault simulation of a system level diagnostic program involving large models (50000 to 200000 gates) and long test sequences. The accuracy of memory models and the interplay of fault insertion and fault selection with diagnostic program development are topics covered. It also details observation and statistical methods and tools used to investigate the operation of 'faulty machines' (the fault effects created by an individual fault source). Observation of individual faulty machines is critical to provide information about looping and erratic programs, violations to subprogram sequencing, etc. This methodology is a successful attempt to make fault simulation of system diagnostics feasible.> Stephen R. Demba, Ernst G. Ulrich, Karen Panetta, David Giramma |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 1988 | Experiences with Concurrent Fault Simulation of Diagnostic ProgramsabstractA methodology is presented for fault-simulation of system level diagnostic programs involving large models (50000 to 200000 gates) and long test sequences. Accuracy of memory models, interplay of target faults with diagnostic program development, and creation of shorter diagnostics are topics covered. Observation and statistical methods and tools used to investigate the operation of the faulty machine within the diagnostic program are also presented. Observation of individual faulty machines is critical to provide information about looping and erratic programs, violations of subprogram sequencing, etc. This methodology makes fault simulation of system diagnostics feasible.> Stephen R. Demba, Ernst G. Ulrich, Karen Panetta, David Giramma |
ITC | 1 |