Demo Data from VLDB 2026 / reviewers in the wild / expert
Edward W. Page
dblp:56/138
· DBLP profile ↗
7ranked-venue papers
2as first author
0since 2021 · last 1999
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-authorArtificial intelligence and machine learning · 2Databases, data management, data science and information retrieval · 1Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
2 papers |
Algorithmic game theory and mechanism design · 64% Mathematical optimization · 36% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 89% Reconfigurable computing and FPGAs · 11% | |
| Artificial intelligence
1 paper |
Optimization for machine learning · 100% |
Topics — the 9 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Algorithmic game theory and mechanism design
resource allocation |
0.0 | 1 | 1991 | Optimization Using Neural Networks · IEEE Trans. Computers 1991 |
Mathematical optimization › combinatorial optimization
assignment problem |
0.0 | 1 | 1987 | A Neural-Network Solution to the Concentrator Assignment Problem · NIPS 1987 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1980 | Minimally Testable Reed-Muller Canonical Forms · IEEE Trans. Computers 1980 |
Electronic design automation › logic synthesis
reed-muller expansion |
0.0 | 1 | 1980 | Minimally Testable Reed-Muller Canonical Forms · IEEE Trans. Computers 1980 |
Electronic design automation › hardware verification and test › fault testing
stuck-at fault testing |
0.0 | 1 | 1980 | Minimally Testable Reed-Muller Canonical Forms · IEEE Trans. Computers 1980 |
Electronic design automation › hardware verification and test
test generation |
0.0 | 1 | 1980 | Minimally Testable Reed-Muller Canonical Forms · IEEE Trans. Computers 1980 |
Electronic design automation
logic synthesis |
0.0 | 2 | 1980 | Programmable Array Realizations of Synchronous Sequential Machines · IEEE Trans. Computers 1977 Minimally Testable Reed-Muller Canonical Forms · IEEE Trans. Computers 1980 |
Reconfigurable computing and FPGAs › reconfigurable architecture
programmable cellular arrays |
0.0 | 1 | 1977 | Programmable Array Realizations of Synchronous Sequential Machines · IEEE Trans. Computers 1977 |
Electronic design automation › logic synthesis
finite state machine synthesis |
0.0 | 1 | 1977 | Programmable Array Realizations of Synchronous Sequential Machines · IEEE Trans. Computers 1977 |
Methods — techniques the papers use, named apart from their topics
recurrent neural network · 0.0neural network · 0.0feedback neural network · 0.0reed-muller canonical expansion · 0.0literal counting · 0.0synthesis algorithm · 0.0k-out-of-n state assignment · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1999 | Using adaptive resonance theory networks and fuzzy matching to recognize target features in thermal imagesabstractAllocating resources to targets in a military engagement is complicated by the diversify of potential targets and by the need to make allocation decisions quickly. This paper describes a hybrid method applied to thermal images in order to discriminate targets with tracks from those having wheels. The hybrid method employs adaptive resonance theory neural networks and a fuzzy matching procedure to classify targets in thermal images that have been subjected to conventional edge enhancement. The performance of the hybrid method is compared to techniques employing global and local template matching. The hybrid algorithm was 15 to 30 times faster than global template matching. While local template matching was faster than the hybrid algorithm in some test cases, the hybrid algorithm generated far fewer false alarms. Also, using fuzzy criteria to locate elements of composite features enables the method to tolerate variations in both target scale and orientation. Alan E. Putman, Gene A. Tagliarini, Edward W. Page |
IJCNN | 3 |
| 1996 | Hopfield Neural Network Simulation on a Massively Parallel Machine
Max J. Domeika, Edward W. Page |
Inf. Sci. | 2 |
| 1996 | Enhancing MLP networks using a distributed data representationabstractMultilayer perceptron (MLP) networks trained using backpropagation can be slow to converge in many instances. The primary reason for slow learning is the global nature of backpropagation. Another reason is the fact that a neuron in an MLP network functions as a hyperplane separator and is therefore inefficient when applied to classification problems in which decision boundaries are nonlinear. This paper presents a data representational approach that addresses these problems while operating within the framework of the familiar backpropagation model. We examine the use of receptors with overlapping receptive fields as a preprocessing technique for encoding inputs to MLP networks. The proposed data representation scheme, termed ensemble encoding, is shown to promote local learning and to provide enhanced nonlinear separability. Simulation results for well known problems in classification and time-series prediction indicate that the use of ensemble encoding can significantly reduce the time required to train MLP networks. Since the choice of representation for input data is independent of the learning algorithm and the functional form employed in the MLP model, nonlinear preprocessing of network inputs may be an attractive alternative for many MLP network applications. Sridhar Narayan, Gene A. Tagliarini, Edward W. Page |
IEEE Trans. Syst. Man Cybern. Part B | 3 |
| 1991 | Optimization Using Neural NetworksabstractThe design of feedback (or recurrent) neural networks to produce good solutions to complex optimization problems is discussed. The theoretical basis for applying neural networks to optimization problems is reviewed, and a design rule that serves as a primitive for constructing a wide class of constraints is introduced. The use of the design rule is illustrated by developing a neural network for producing high-quality solutions to a probabilistic resource allocation task. The resulting neural network has been simulated on a high-performance parallel processor that has been optimized for neural network simulation.> Gene A. Tagliarini, J. Fury Christ, Edward W. Page |
IEEE Trans. Computers | 3 |
| 1987 | A Neural-Network Solution to the Concentrator Assignment Problem
Gene A. Tagliarini, Edward W. Page |
NIPS | 2 |
| 1980 | Minimally Testable Reed-Muller Canonical FormsabstractArbitrary switching function realizations based upon Reed- Muller canonical (RMC) expansions have been shown to possess many of the desirable properties of easily testable networks. While realizations based upon each of the 2n possible RMC expansions of a given switching function can be tested for permanent stuck-at-0 and stuck-at-1 faults with a small set of input vectors, certain expansions lead to an even smaller test set because of the resulting network topology. In particular, the selection of an RMC expansion that has a minimal number of literals appearing in an even number of product terms will give rise to switching function realizations requiring still fewer tests. This correspondence presents a solution to the problem of selecting the RMC expansion of a given switching function possessing the smallest test set. Edward W. Page |
IEEE Trans. Computers | 1 |
| 1977 | Programmable Array Realizations of Synchronous Sequential MachinesabstractCellular-array realizations of switching functions have been studied in order to take advantage of the many design possibilities offered by large-scale integration technology. This paper introduces a class of programmable cellular arrays that can be employed to realize arbitrary synchronous sequential machines. State assignments based upon k-out-of-m codes are employed to give rise to machine excitation and output equations in a consistent functional form suitable for implementation via a cellular structure. The proposed arrays are programmable, which makes possible the capability of re-configuring an array to realize different machines by electronically altering the function implemented by each cell of the array. A synthesis algorithm is presented that will allow the designer to program the array without explicitly deriving excitation and output functions. The synthesis technique is applicable to both Mealy and Moore machines with any number of inputs, outputs, and internal states, and utilizing either delay or trigger flip-flops. Edward W. Page, Peter N. Marinos |
IEEE Trans. Computers | 1 |