Hari K. Nagpal

dblp:56/168 · DBLP profile ↗
← Back
2ranked-venue papers
2as first author
0since 2021 · last 1983
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 62% Integrated circuit design · 38%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › machine learning accelerator › neural network accelerator › convolution acceleration
convolution accelerator
0.011983
Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic · IEEE Trans. Computers 1983
Integrated circuit design
digital circuit design
0.011983
Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic · IEEE Trans. Computers 1983
Integrated circuit design
finite field arithmetic
0.011983
Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic · IEEE Trans. Computers 1983

Methods — techniques the papers use, named apart from their topics

simulation · 0.0number-theoretic transform · 0.0finite field arithmetic · 0.0
YearPublicationVenuePosition
1983 Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic
abstract
This paper describes the theory, simulation, and construction of a two-dimensional number theoretic transform (NTT) convolver. The convolver performs indirect convolution by using the cyclic convolution property of a class of generalized discrete Fourier transforms (DFT's) defined over rings isomorphic to direct sums of Galois fields. The paper first presents the theoretical development of the computational element required for computing the generalized discrete Fourier transform (GDFIT) and its inverse. The theory extends the use of base fields to second degree extension fields and provides efficient choices for transform parameters to minimize hardware. The paper next presents results of recent work in multidimensional transform memory structures, and extends this work to the complete convolution process. The two theories are then "married" to produce efficient, very high speed convolution architectures. Simulation results are presented for a second degree extension field image convolver and constructional details are presented for a fast image convolver using 2 base fields and designed to operate as a peripheral to a fast 32 bit minicomputer.
Hari K. Nagpal, Graham A. Jullien, William C. Miller
IEEE Trans. Computers1
1982 Memory architecture of a video-rate image convolver
abstract
This paper describes the design of an image convolver suitable for the convolution of a (256 × 256) image with large filter impulse responses in under 1/30 of a second. The memory architecture of the convolver is based on the structures associated with parallel and pipelined FFT/NTT processors that use ROM oriented implementation of the Residue Number System and a 2 D radix-r Ordered-input, Ordered-output FFT algorithm. The 2 D convolution operation is performed by the use of overlap-save technique of sectioned convolutions.
Hari K. Nagpal, Graham A. Jullien, William C. Miller
ICASSP1