We present Decoupled Fallback, a work-stealing method that enables single-pass Chained Scans to run on hardware without forward-progress guarantees (FPG) while avoiding starvation. Additionally, we introduce a tile state representation for Chained Scans that does not rely on 64-bit atomics or memory barriers for correctness, along with a subgroup-size-agnostic intra-workgroup implementation. On FPG-lacking devices---Apple M1 Max and M3---Decoupled Fallback achieves near-Memcpy speeds for inclusive prefix sum using the native Dawn implementation of the WebGPU standard, and approaches the full theoretically expected 50% speedup over the slower Reduce-then-Scan approach. We further demonstrate the resilience of Decoupled Fallback against unfair schedulers by simulating blocking at rates of up to 50%, showing that it maintains superior performance over Reduce-then-Scan even under extreme contention.

Shared memory platforms provide a memory consistency specification (MCS) so that developers can reason about the behaviors of their parallel programs. Unfortunately, ensuring that a platform conforms to its MCS is difficult, as is exemplified by numerous bugs in well-used platforms. While existing MCS testing approaches find bugs, their efficacy depends on the testing environment (e.g. if synthetic memory pressure is applied). MCS testing environments are difficult to evaluate since legitimate MCS violations are too rare to use as an efficacy metric. As a result, prior approaches have missed critical MCS bugs.

Static memory management replaces runtime garbage collection with compile-time annotations that make all memory allocation and deallocation explicit in a program. We improve upon the Tofte/Talpin region-based scheme for compile-time memory management[TT94]. In the Tofte/Talpin approach, all values, including closures, are stored in regions. Region lifetimes coincide with lexical scope, thus forming a runtime stack of regions and eliminating the need for garbage collection. We relax the requirement that region lifetimes be lexical. Rather, regions are allocated late and deallocated as early as possible by explicit memory operations. The placement of allocation and deallocation annotations is determined by solving a system of constraints that expresses all possible annotations. Experiments show that our approach reduces memory requirements significantly, in some cases asymptotically.