Demo Data from VLDB 2026 / reviewers in the wild / expert
Michel S. Nakhla
dblp:56/4034 · also Michel Nakhla
· DBLP profile ↗
45ranked-venue papers
3as first author
0since 2021 · last 2018
0000-0001-8327-0396ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 38Computer networks · 3 · 3 first-authorSoftware engineering, systems software and programming languages · 2Applied, interdisciplinary, general and emerging computing · 2Graphics, computer vision, multimedia, augmented reality and games · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
16 papers |
Electronic design automation · 93% Integrated circuit design · 4% High-performance computing · 2% | |
| Interdisciplinary, comprehensive, and emerging computing
1 paper |
Computational science and engineering · 100% |
Topics — the 30 heaviest of 38, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
circuit simulation |
0.3 | 8 | 2010 | Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2009 Model-Reduction of Nonlinear Circuits Using Krylov-Space Techniques · DAC 1999 |
Electronic design automation
signal integrity |
0.2 | 10 | 2008 | A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 Model order reduction of nonuniform transmission lines using integrated congruence transform · DAC 2003 Simulation of high-speed distributed interconnects using Krylov-space techniques · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation › circuit simulation
model order reduction |
0.2 | 7 | 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transform · DAC 2003 Simulation of high-speed interconnects · Proc. IEEE 2001 Simulation of high-speed distributed interconnects using Krylov-space techniques · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Computational science and engineering › numerical analysis
numerical integration |
0.1 | 1 | 2012 | Structural Characterization and Efficient Implementation Techniques for $A$-Stable High-Order Integration Methods · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 |
Electronic design automation › circuit simulation
interconnect simulation |
0.1 | 8 | 2001 | Simulation of high-speed interconnects · Proc. IEEE 2001 Simulation of high-speed distributed interconnects using Krylov-space techniques · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 Full-wave analysis of high-speed interconnects using complex frequency hopping · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 |
Electronic design automation › circuit simulation
transient analysis |
0.1 | 4 | 2009 | A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2009 Analysis of nonuniform, frequency-dependent high-speed interconnects using numerical inversion of Laplace transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 Mixed frequency/time domain analysis of nonlinear circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Electronic design automation › circuit simulation
parallel circuit simulation |
0.1 | 1 | 2010 | Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 |
Electronic design automation › circuit simulation
steady-state analysis |
0.1 | 1 | 2010 | Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 |
Electronic design automation › circuit simulation
analog and mixed-signal simulation |
0.1 | 1 | 2009 | A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential Equations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2009 |
Electronic design automation
interconnect modeling |
0.1 | 4 | 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transform · DAC 2003 Passive model order reduction of multiport distributed interconnects · DAC 2000 Addressing High-Speed Interconnect Issues in Asymptotic Waveform Evaluation · DAC 1993 |
Electronic design automation › interconnect modeling
interconnect macromodeling |
0.1 | 1 | 2008 | A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 |
Electronic design automation › circuit simulation › reduced-order modeling
passive reduced-order modeling |
0.1 | 1 | 2008 | A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 |
Electronic design automation › interconnect modeling
transmission line modeling |
0.1 | 2 | 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transform · DAC 2003 Passive model order reduction of multiport distributed interconnects · DAC 2000 |
Electronic design automation › circuit simulation › model order reduction
moment matching |
0.0 | 3 | 1998 | Full-wave analysis of high-speed interconnects using complex frequency hopping · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 Analysis of interconnect networks using complex frequency hopping (CFH) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 Generalized Moment-Matching Methods for Transient Analysis of Interconnect Networks · DAC 1992 |
Electronic design automation
integrated congruence transform |
0.0 | 1 | 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transform · DAC 2003 |
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 2 | 1999 | Model-Reduction of Nonlinear Circuits Using Krylov-Space Techniques · DAC 1999 Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993 |
Integrated circuit design › interconnect
multiconductor transmission line |
0.0 | 1 | 2008 | A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2008 |
Electronic design automation › circuit simulation
nonlinear circuit analysis |
0.0 | 1 | 1999 | Model-Reduction of Nonlinear Circuits Using Krylov-Space Techniques · DAC 1999 |
Electronic design automation › electromagnetic simulation
full-wave analysis |
0.0 | 1 | 1998 | Full-wave analysis of high-speed interconnects using complex frequency hopping · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 |
Electronic design automation › circuit simulation › model order reduction
asymptotic waveform evaluation |
0.0 | 2 | 1993 | Addressing High-Speed Interconnect Issues in Asymptotic Waveform Evaluation · DAC 1993 Analysis of high-speed VLSI interconnects using the asymptotic waveform evaluation technique · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Interconnection networks and networks-on-chip
high-speed interconnect |
0.0 | 2 | 2001 | Simulation of high-speed interconnects · Proc. IEEE 2001 Full-wave analysis of high-speed interconnects using complex frequency hopping · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998 |
Physical-layer communications › interference
intersymbol interference |
0.0 | 2 | 1994 | Error probability for multilevel digital systems in presence of intersymbol interference and additive noise · IEEE Trans. Commun. 1994 Performance Evaluation of Optical Fiber Transmission Systems · IEEE J. Sel. Areas Commun. 1990 |
Interconnection networks and networks-on-chip › high-speed interconnect
high-speed interconnect modeling |
0.0 | 2 | 1993 | Addressing High-Speed Interconnect Issues in Asymptotic Waveform Evaluation · DAC 1993 Generalized Moment-Matching Methods for Transient Analysis of Interconnect Networks · DAC 1992 |
Physical-layer communications › digital transmission systems
digital communication performance |
0.0 | 1 | 1994 | Error probability for multilevel digital systems in presence of intersymbol interference and additive noise · IEEE Trans. Commun. 1994 |
Physical-layer communications
error probability analysis |
0.0 | 1 | 1994 | Error probability for multilevel digital systems in presence of intersymbol interference and additive noise · IEEE Trans. Commun. 1994 |
Electronic design automation
circuit simulation and verification |
0.0 | 1 | 1994 | Analysis of nonuniform, frequency-dependent high-speed interconnects using numerical inversion of Laplace transform · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation › signal integrity
crosstalk analysis |
0.0 | 1 | 1993 | Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993 |
Electronic design automation › circuit simulation
nonlinear circuit simulation |
0.0 | 1 | 1993 | Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminations · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993 |
Integrated circuit design › interconnect
VLSI interconnect |
0.0 | 1 | 1992 | Analysis of high-speed VLSI interconnects using the asymptotic waveform evaluation technique · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992 |
Physical-layer communications
error probability evaluation |
0.0 | 1 | 1990 | Performance Evaluation of Optical Fiber Transmission Systems · IEEE J. Sel. Areas Commun. 1990 |
Methods — techniques the papers use, named apart from their topics
obreshkov formula · 0.2jacobian factorization · 0.1model order reduction · 0.1parallel nonlinear solver · 0.1message passing interface · 0.1passivity proof · 0.1integrated congruence transform · 0.1orthonormal basis construction · 0.0krylov-based projection · 0.0asymptotic waveform evaluation · 0.0complex frequency hopping · 0.0minimax approximation · 0.0cumulative distribution function · 0.0cumulative distribution function approximation · 0.0simulation · 0.0queueing theory · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | Dynamic GPU Parallel Sparse LU Factorization for Fast Circuit Simulation
Wai-Kong Lee, Ramachandra Achar, Michel S. Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 3 |
| 2017 | Parallel High-Order Envelope-Following Method for Fast Transient Analysis of Highly Oscillatory CircuitsabstractIn this paper, a parallel high-order envelope-following (EF) method is presented. The proposed method exploits the high-order and A-stable Obreshkov formula (ObF) to provide superior accuracy and speedup for the EF technique. Utilizing ObF provides accurate and faster analysis while keeping the same accuracy as the conventional low-order integration methods. In addition, a parallel method that is based on multiple-shooting (MS) techniques is used. Using MS allows partitioning and solving the sensitivity equations in parallel. It is also shown that with proper partitioning scheme, high CPU scalability can be achieved. Mina A. Farhan, Michel S. Nakhla, Emad Gad, Ramachandra Achar |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 2014 | Addressing Partitioning Issues in Parallel Circuit SimulationabstractWith the rapidly increasing demands for high-speed and high-density electronic products, complexity and size of the associated circuits have increased significantly in the recent years. The large size of these circuits poses major challenges for simulation in terms of excessive CPU cost. To address this, a parallel circuit simulation algorithm has been recently developed that allows modern multicore processors to be exploited to realize higher parallel scalability with an increasing number of CPUs. In this paper, several methods have been proposed to improve efficiency and flexibility during the partitioning of analog circuits. The proposed methods reduce the constraints for partitioning, allowing a more efficient set of partitions to be found, which improves scalability when used in a parallel implementation. Douglas Paul, Ramachandra Achar, Michel S. Nakhla, Natalie Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 3 |
| 2012 | Structural Characterization and Efficient Implementation Techniques for $A$-Stable High-Order Integration MethodsabstractThis paper presents structural characterization and performance enhancement strategies for the recently proposedA-stable and L-stable high-order integration methods based on the Obreshkov formula. It is demonstrated that although the Jacobian matrix in these methods has a bigger size than the Jacobian matrix in classical low-order methods, it enjoys a special structure that can be used to develop efficient factorization techniques. In addition, the paper proposes a method to reduce the number of Newton-Raphson iterations needed to converge in the large Jacobian domain. Yinghong Zhou, Emad Gad, Michel S. Nakhla, Ramachandra Achar |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2011 | Parallel and Scalable Transient Simulator for Power Grids via Waveform Relaxation (PTS-PWR)abstractThis paper presents a fast algorithm for transient simulation of power grids in very large scale integration systems using waveform relaxation (WR) techniques. Novel partitioning methods and convergence accelerators are developed for fast convergence of WR iterations when applied to power grid networks. Unlike the direct solvers, the new method is highly parallelizable and scales well with the increasing number of CPUs, leading to significant speed-ups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method. Ramachandra Achar, Michel S. Nakhla, Harjot S. Dhindsa, Arvind R. Sridhar, Douglas Paul, Natalie Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 2010 | Comparison Study of Performance of Parallel Steady State Solver on Different Computer ArchitecturesabstractA parallel solver for steady state analysis of nonlinear circuits is presented. The solver uses the Message Passing Interface specification for communications and is suitable for steady state simulation of very large nonlinear circuits. Performance of the solver is investigated on symmetric multiprocessing, non-uniform memory access, and distributed memory computer systems. Impact of memory subsystem constraints on the solver efficiency is evaluated. Nick Soveiko, Michel S. Nakhla, Ramachandra Achar |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2009 | A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential EquationsabstractThis paper describes a new$A$- and$L$-stable integration method for simulating the time-domain transient response of nonlinear circuits. The proposed method, which is based on the Obreshkov formula, can be made of arbitrary high order while maintaining the$A$-stability property. The new method allows for the adoption of higher order integration methods for the transient analysis of electronic circuits while enabling them to take larger step sizes without violating the stability, leading to faster simulations. The method can be run in an$L$-stable mode to handle circuits with extremely stiff equations. Necessary theoretical foundations, implementation details, error-control mechanisms, and computational results are presented. Emad Gad, Michel S. Nakhla, Ramachandra Achar, Yinghong Zhou |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2009 | Passivity Compensation Algorithm for Method-of-Characteristics-Based Multiconductor Transmission Line Interconnect MacromodelsabstractComputation of passive and compact macromodels of distributed interconnects has gained considerable importance during the recent years. Method of characteristics (MoC) is widely used for macromodeling of transmission lines, however, it may not be guaranteed passive. This paper presents a new algorithm for passivity enforcement of MoC-based macromodels of multiconductor transmission lines. The algorithm is based on the first-order perturbation of the related delay differential equations and can handle single as well as coupled interconnects. Necessary theoretical foundations and validating numerical results are presented. Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub |
IEEE Trans. Very Large Scale Integr. Syst. | 5 |
| 2008 | A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence TransformabstractThis paper presents a robust method for guaranteed passive macromodeling of high-speed interconnects characterized by multiconductor transmission lines with frequency-dependent per-unit-length (FD-PUL) parameters, using integrated-congruence-transformation-based model-order-reduction techniques. For this purpose, a new formulation is developed to directly incorporate state-space equations corresponding to the positive-real (PR) rational functions representing the frequency dependence of PUL parameters, in Telegrapher's equations. The proposed formulation overcomes the need for explicit lumped-circuit realization with all positive elements for PR rational functions of FD-PUL parameters. Proof of passivity and numerical examples are presented to validate the theory. Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 5 |
| 2007 | Sparse and passive reduction of massively coupled large multiport interconnectsabstractThe large number of ports in an interconnect struc- ture is a critical limiting factor when applying model-order reduction. This is due to the fact that the size of the reduced model grows rapidly with increasing the number of ports, lead- ing to large and dense circuit matrices. To address this problem, a novel method based on transverse partitioning and waveform relaxation is proposed for passive model-order reduction of massively coupled large multiport interconnects. The new method effectively replaces the tightly coupled multiport reduced model with decoupled 2-port subcircuits. In addition to preserving the advantages of model-order reduction, the compu- tational complexity of the new method grows only linearly with the number of lines. Natalie Nakhla, Michel S. Nakhla, Ramachandra Achar |
ICCAD | 2 |
| 2007 | Fast Passivity Verification and Enforcement via Reciprocal Systems for Interconnects With Large Order MacromodelsabstractWith the ever increasing signal speeds, signal integrity issues of high-speed VLSI designs are presenting increasingly difficult challenges for state-of-the-art modeling and simulation tools. Consequently, characterization and passive macromodeling of high-speed modules such as interconnects, vias, and packages based on tabulated data are becoming important. This paper presents a fast algorithm for passivity verification and enforcement of large order macromodels of scattering parameter based multiport subnetworks. Numerous examples tested on this algorithm demonstrate a significant speed-up compared to the existing algorithms in the literature Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 3 |
| 2006 | A Projection-Based Reduction Approach to Computing Sensitivity of Steady-State Response of Nonlinear CircuitsabstractThis paper presents a new algorithm for computing the sensitivity of steady-state responses of nonlinear circuits with respect to an arbitrary network parameter. The proposed algorithm is based on circuit-reduction techniques obtained through nonlinear-projection approaches. The main idea in the proposed sensitivity-computation algorithm is based on projecting the adjoint system of equations onto a subspace of smaller dimension. Continuation methods are then applied on the reduced system to trace the solution trajectory of the adjoint system in the reduced space. We show that once the steady-state solution has been obtained using nonlinear order reduction, the computational cost required to compute sensitivity is only a limited number of forward/backward substitutions. Numerical examples are presented to demonstrate the accuracy and efficiency of the proposed algorithm. Praveen Pai, Emad Gad, Ramachandra Achar, Michel S. Nakhla, Roni Khazaka |
INFORMS J. Comput. | 4 |
| 2005 | Delay extraction based closed-form SPICE compatible passive macromodels for distributed transmission line interconnectsabstractTime-domain macromodeling of high speed interconnects characterized by distributed transmission lines has generated immense interest during the recent years. It has been demonstrated that, preserving passivity of the macromodel is essential to guarantee a stable global transient simulation. In this paper, a SPICE compatible closed-form passive macromodel for distributed transmission lines is presented. The proposed method enables representation of the distributed stamp in terms of simple delay and resistive elements. The new method while guaranteeing the passivity of the macromodel, provides significant speedup, and enables easy implementation. Necessary formulation and validation examples are given. Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Anestis Dounavis |
ASP-DAC | 3 |
| 2005 | Global Passivity Enforcement Algorithm for Macromodels of Interconnect Subnetworks Characterized by Tabulated DataabstractWith the continually increasing operating frequencies, complex high-speed interconnect and package modules require characterization based on measured/simulated data. Several algorithms were recently suggested for macromodeling such types of data to enable unified transient analysis in the presence of external network elements. One of the critical issues involved here is the passivity violations associated with the computed macromodel. To address this issue, a new passivity enforcement algorithm is presented in this paper. The proposed method adopts a global approach for passivity enforcement by ensuring that the passivity correction at a certain region does not introduce new passivity violations at other parts of the frequency spectrum. It also provides an error estimate for the response of the passivity corrected macromodel. Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 3 |
| 2004 | Efficient simulation of nonuniform transmission lines using integrated congruence transformabstractThis paper presents a new algorithm based on integrated congruence transform for efficient simulation of nonuniform transmission lines. The proposed algorithm introduces the concept of model-order reduction (MOR) via implicit usage of the Hilbert-space moments in distributed networks. The key idea in the proposed algorithm is the development of an orthogonalization procedure that does not require the explicit computation of the Hilbert-space moments in order to find their spanning orthogonal basis. The proposed orthogonalization procedure can thus be used to compute an orthogonal basis for any set of elements that are related through a differential operator in a generalized Hilbert space, without the need to have these elements in an explicit form. The proposed algorithm also addresses the problem of MOR of nonuniform transmission lines, through defining a weighted inner product and norm mappings over the Hilbert space of the moments. Numerical examples demonstrate more accurate numerical approximation capabilities over using the moments explicitly. Emad Gad, Michel S. Nakhla |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transformabstractThis paper presents a new algorithm based on Integrated Congruence transform for the analysis of both uniform and nonuniform transmission lines. The key advantage of the proposed algorithm is that constructing a spanning orthonormal basis for the space-dependent moments is done without computing these moments explicitly. The proposed algorithm thus carries the numerical efficiency of Krylov-based projection techniques of lumped RLC networks to the domain of the distributed transmission line networks. The proposed algorithm can be used to construct an orthogonal basis for any set of moments related through a differential operator. Emad Gad, Michel S. Nakhla |
DAC | 2 |
| 2002 | Efficient Model Reduction of Linear Time-Varying Systems via Compressed Transient System FunctionabstractThis paper presents a new approach for model-order reduction of linear time varying system based on expanding the time-varying system in the right half plane of the s-domain. The proposed algorithm is developed through introducing Krylov subspace-based reduction to time-varying transfer functions. The proposed algorithm does not require solution of large system of equations to construct a basis for the time-varying moments. Instead, it computes such a basis through time-domain integration of the corresponding linear time-varying differential algebraic equations. Numerical experiments show that expanding in the right-half plane compresses the transient phase of the response of these equations by several orders of magnitude. Emad Gad, Michel S. Nakhla |
DATE | 2 |
| 2002 | Compact Macromodel for Lossy Coupled Transmission LinesabstractThis paper describes a systematic algorithm for obtaining passive time domain reduced order transmission line macromodels. The proposed algorithm makes use of a new order reduction technique that removes the redundant poles obtained using conventional order reduction methods. The reduced macromodel is passive by construction. Roni Khazaka, Michel S. Nakhla |
DATE | 2 |
| 2001 | Simulation of high-speed interconnectsabstractWith the rapid developments in very large-scale integration (VLSI) technology, design and computer-aided design (CAD) techniques, at both the chip and package level, the operating frequencies are fast reaching the vicinity of gigahertz and switching times are getting to the subnanosecond levels. The ever increasing quest for high-speed applications is placing higher demands on interconnect performance and highlighted the previously negligible effects of interconnects such as ringing, signal delay, distortion, reflections, and crosstalk. In this review paper various high-speed interconnect effects are briefly discussed. In addition, recent advances in transmission line macromodeling techniques are presented. Also, simulation of high-speed interconnects using model-reduction-based algorithms is discussed in detail. Ramachandra Achar, Michel S. Nakhla |
Proc. IEEE | 2 |
| 2001 | Correction To "simulation of high-speed Interconnects"abstractIn the above paper,1 we wish to call the attention of the reader-ship to an error that appears on p. 721. Fig. 27 should have appeared as follows: We regret any confusion this may have caused. Ramachandra Achar, Michel S. Nakhla |
Proc. IEEE | 2 |
| 2000 | Passive model order reduction of multiport distributed interconnectsabstractSignal integrity analysis has become imperative for high-speed designs. In this paper, we present a new technique to advance Krylov-space based passive model-reduction algorithms to include lossy coupled transmission lines described by Telegrapher's equations. In the proposed scheme, transmission line subnetworks are treated with closed-form stamps obtained using matrix-exponential Padé, where the coefficients describing the model are computed a priori and analytically. In addition, a technique is given to ensure that the contribution of these stamps to the modified nodal analysis (MNA) formulation leads to guaranteed passive macromodel. Emad Gad, Anestis Dounavis, Michel S. Nakhla, Ramachandra Achar |
DAC | 3 |
| 2000 | Simulation of high-speed distributed interconnects using Krylov-space techniquesabstractAccurate simulation of large interconnect networks has become a necessity to address signal integrity issues in high-speed designs. Recently, several model-reduction techniques based on Krylov-space methods have been proposed for efficient simulation of large linear networks, However, these methods treat the distributed networks in terms of their lumped representations. In order to overcome this difficulty, a new technique based on congruent transformation is presented in this paper to directly include distributed systems described by Telegrapher's partial differential equations,. Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1999 | Model-Reduction of Nonlinear Circuits Using Krylov-Space TechniquesabstractA new algorithm based on Krylov subspace methods is proposed for model-reduction of large nonlinear circuits.Reduction is obtained by projecting the original system described by nonlinear differential equations into a subspace of a lower dimension.The reduced model can be simulated using conventional numerical integration techniques.Significant reduction in computational expense is achieved as the size of the reduced equations is much less than that of the original system.1. Pavan K. Gunupudi, Michel S. Nakhla |
DAC | 2 |
| 1999 | Model reduction for DC solution of large nonlinear circuitsabstractA new algorithm based on model reduction using the Krylov subspace technique is proposed to compute the DC solution of large nonlinear circuits. The proposed method combines continuation methods with model reduction techniques. Thus it enables the application of the continuation methods to an equivalent reduced-order set of nonlinear equations instead of the original system. This results in a significant reduction in the computational expense as the size of the reduced equations is much less than that of the original system. The reduced order system is obtained by projecting the set of nonlinear equations, whose solution represents the DC operating point, into a subspace of a much lower dimension. It is also shown that both the reduced-order system and the original system share the first q derivatives w.r.t. the circuit variable used to parameterize the family of the solution trajectories generated by the continuation method. Emad Gad, Michel S. Nakhla |
ICCAD | 2 |
| 1998 | Full-wave analysis of high-speed interconnects using complex frequency hoppingabstractAccurate simulation of large interconnect networks has become a necessity to address signal-integrity issues in current high-speed very-large-scale-integration designs. To accurately characterize a dispersive system of interconnects at higher frequencies, a full-wave analysis is required. However, conventional circuit simulation of interconnects with full-wave models is extremely CPU expensive. Recently published moment-matching techniques provide a generalized approach to lumped/distributed circuit response approximations. However, these techniques are based on quasi-transverse electromagnetic mode (TEM) assumption and have no mechanism to handle full-wave models. In this paper, we present a new method to extend model-reduction techniques for simulation of full-wave models. The following three new results are presented in this paper: 1) a generalized method to combine modal results from a full-wave analysis into circuit simulators; 2) a new algorithm for moment generation involving full-wave models; 3) deviations associated with quasi-TEM approximations compared to full-wave models at higher frequencies. The proposed algorithm yields a speed up of 1 to 2 orders of magnitude for a comparable accuracy with conventional techniques. In addition, the proposed method can be used for a mixed simulation involving distributed models with frequency dependent/independent RLCG parameters, full-wave interconnect models and measured subnetworks along with nonlinear terminations. Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1997 | A new high-order absolutely-stable explicit numerical integration algorithm for the time-domain simulation of nonlinear circuitsabstractA new numerical integration method for the time-domain simulation of nonlinear circuits is presented. The new method does not belong to the traditional class of linear multistep methods. Consequently, it is free from Dahlquist's (1963) barriers in terms of stability and order. The new method is shown to be both A-stable and at the same time of arbitrarily high order. In addition, the method is explicit in nature and does not require matrix inversion at each time step. Examples of linear and nonlinear circuit simulation are included. The proposed method significantly speeds up the time-domain simulation of nonlinear circuits as it combines the efficiency of an explicit method with the accuracy and large step size possible with high order. J. Richard Griffith, Michel S. Nakhla |
ICCAD | 2 |
| 1996 | An efficient approach for moment-matching simulation of linear subnetworks with measured or tabulated dataabstractThis paper describes a new moment-generation algorithm for efficient simulation of linear subnetworks characterized by measured or tabulated data using moment-matching techniques. The subnetwork moments are computed by performing an integration in time-domain on the measured data. The proposed technique is more accurate as it relies on integration as compared to the previously published approaches which depend on the differentiation of measured data in frequency-domain for computation of moments. Using the new moment-generation technique, the CFH (Complex Frequency Hopping) algorithm has been extended to handle measured subnetworks. Also a generalized stencil for measured data for inclusion in circuit simulators and to facilitate efficient moment-generation has been presented. Examples and comparison with conventional simulations are provided. The method is accurate while it is faster than the conventional approach by 1 to 2 orders of magnitude. Guowu Zheng, Qi-Jun Zhang, Michel S. Nakhla, Ramachandra Achar |
ICCAD | 3 |
| 1995 | A high-order temporal neural network for word recognitionabstractAn important yet challenging task for neural network based speech recognizers is the effective processing of temporal information in speech signals. A high-order fully recurrent neural network is developed to effectively handle the sequential nature of speech signals and to accommodate both temporal and spectral variations. The proposed neural network has 4 layers, namely, the input layer, self organizing map, fully recurrent hidden layer and output layer. The important characteristics of the hidden neurons and the output neurons are their high-order processing feature. A 2-stage unsupervised/supervised training method is developed. The solution from unsupervised training provides a good starting point for supervised training. The proposed neural network and the training method are applied to isolated word recognition using the TI20 data. Qi-Jun Zhang, Michel S. Nakhla |
ICASSP | 3 |
| 1995 | Addressing high frequency effects in VLSI interconnects with full wave model and CFHabstractIn order to accurately characterize dispersive system of VLSI interconnects at higher frequencies, full wave analysis which takes into account all possible field components and satisfies all boundary conditions is required. However, conventional circuit simulation of interconnects with full wave models is extremely CPU expensive. This paper presents a new method to extend the moment matching technique, complex frequency hopping, to the case of interconnects modeled with full wave analysis. Formulation of circuit equations is modified to incorporate interconnect stencil from full wave analysis. A new algorithm for the moment generation for interconnect networks with full wave models has been developed. Full wave analysis has been carried out with the efficient 'spectral domain approach'. Results have shown that the proposed method is accurate while it yields a speed up of one to three orders of magnitude over conventional simulation techniques. Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang |
ICCAD | 2 |
| 1995 | Analysis of interconnect networks using complex frequency hopping (CFH)abstractWith increasing miniaturization and operating speeds, loss of signal integrity due to physical interconnects represents a major performance limiting factor of chip-, board- or system-level design. Moment-matching techniques using Pade approximations have recently been applied to simulating modelled interconnect networks that include lossy coupled transmission lines and nonlinear terminations, giving a marked increase in efficiency over traditional simulation techniques. Nevertheless, moment-matching can be inaccurate in high-speed circuits due to critical properties of Pade approximations. Further, moment-generation for transmission line networks can be shown to have increasing numerical truncation error with higher order moments. These inaccuracies are reflected in both the frequency and transient response and there is no criterion for determining the limits of the error. In this paper, a multipoint moment-matching, or complex frequency hopping (CFH) technique is introduced which extracts accurate dominant poles of a linear subnetwork up to any predefined maximum frequency. The method generates a single transfer function for a large linear subnetwork and provides for a CPU/accuracy tradeoff. A new algorithm is also introduced for generating higher-order moments for transmission lines without incurring increasing truncation error. Several interconnect examples are considered which demonstrate the accuracy and efficiency in both the time and frequency domains of the new method.> Eli Chiprout, Michel S. Nakhla |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1994 | Signal Integrity Analysis and Optimization of VLSI Interconnects using Neural Network ModelsabstractSignal integrity issues such as delay and crosstalk are important in designing high-speed printed circuits boards and multichip modules. A complete signal integrity analysis and optimization require repeated simulation of distributed networks which can be very CPU intensive. In this paper an efficient approach is presented using neural network models to describe the signal integrity behaviour of a distributed network. The model is used to formulate a signal integrity optimization problem, replacing exact circuit simulations. This approach has been used in analysis and yield optimization of high-speed VLSI interconnects and is much faster than the standard optimization.> Qi-Jun Zhang, Michel S. Nakhla |
ISCAS | 2 |
| 1994 | Analysis of nonuniform, frequency-dependent high-speed interconnects using numerical inversion of Laplace transformabstractInterconnects in high-speed VLSI circuits and systems exhibit transmission line effects. Due to the complex geometries of interconnections, coupling between various layers, and inhomogeneous insulating materials, these high-speed interconnects need to be modelled as nonuniform frequency dependent transmission lines. In this paper, we describe a method of simulating the transient response of nonuniform high-speed interconnects in its most general form, i.e. nonuniformly distributed, lossy, coupled, multiple lines with frequency-dependent parameters with linear and nonlinear terminations. Transmission line equations are formulated in the frequency domain as an initial value problem and solved using numerical integration. A new algorithm is proposed for overcoming the inherent initial value instability encountered in the solution of transmission line equations. The time domain response is obtained by Numerical Inversion of Laplace Transform (NILT). Nonlinear networks containing nonuniform high-speed interconnects are analyzed using the Piecewise Decomposition Technique. The accuracy and efficiency of the proposed method is illustrated by appropriate examples and comparisons with published results.> Sanjay L. Manney, Michel S. Nakhla, Qi-Jun Zhang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1994 | Error probability for multilevel digital systems in presence of intersymbol interference and additive noiseabstractGeneralization of a recently published technique for the evaluation of error probability in fiber-optic communication systems is described. The crux of the method is a minimax approximation of the cumulative distribution function of the additive noise. The additive noise is not constrained to be Gaussian. Examples and comparisons with previously published techniques are presented.> Michel S. Nakhla |
IEEE Trans. Commun. | 1 |
| 1993 | Addressing High-Speed Interconnect Issues in Asymptotic Waveform EvaluationabstractArticle Free Access Share on Addressing high-speed interconnect issues in asymptotic waveform evaluation Authors: Eli Chiprout View Profile , Michel Nakhla View Profile Authors Info & Claims DAC '93: Proceedings of the 30th international Design Automation ConferenceJuly 1993 Pages 732–736https://doi.org/10.1145/157485.165110Published:01 July 1993Publication History 15citation254DownloadsMetricsTotal Citations15Total Downloads254Last 12 Months11Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF Eli Chiprout, Michel S. Nakhla |
DAC | 2 |
| 1993 | Simulating 3-D retarded interconnect models using complex frequency hopping (CFH)abstractWith ever increasing clock frequencies, accurate 3-D interconnect analysis in chips and packages is becoming a necessity. The retarded partial element equivalent circuit (rPEEC) method has been successfully applied to 3-D analysis but for large problems it becomes expensive in CPU and memory usage, and in time domain it sometimes has numerical problems. Complex frequency hopping (CFH), a new multi-point moment-matching technique, is expanded to handle retarded networks. CFH speeds up rPEEC frequency domain analysis of large frequency bands significantly. It also allows the efficient calculation of resonances and - most importantly - enables time domain modeling of rPEEC networks that have so far resisted analysis by any other method. Eli Chiprout, Hansruedi Heeb, Michel S. Nakhla, Albert E. Ruehli |
ICCAD | 3 |
| 1993 | Parallel Time Domain Analysis and Optimization of Distributed VLSI Interconnects
J. Richard Griffith, Qi-Jun Zhang, Michel S. Nakhla |
ISCAS | 3 |
| 1993 | Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminationsabstractA method for analysis of VLSI interconnects that contain both lossy coupled transmission lines and nonlinear components is presented. An equivalent time-domain macromodel is derived for the linear subnetworks that contain lossy coupled transmission lines. The macromodel takes the form of a set of ordinary differential equations. The method takes full advantages of the asymptotic waveform evaluation (AWE) technique, which offers two to three orders of magnitude speed-up relative to other methods with comparable accuracy. In addition, it does not require explicit evaluation of the dominant poles of the network. The proposed technique can be easily implemented within the framework of an existing conventional circuit simulator such as SPICE.> Dong H. Xie, Michel S. Nakhla |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1992 | Generalized Moment-Matching Methods for Transient Analysis of Interconnect Networks
Eli Chiprout, Michel S. Nakhla |
DAC | 2 |
| 1992 | Time domain analysis of nonuniform frequency dependent high-speed interconnectsabstractA method based on numerical inversion of the Laplace transform for the transient analysis of nonuniform high-speed interconnects in LSI/VLSI circuits is described. The interconnects are treated as lossy multiconductor nonuniform frequency dependent transmission lines. An algorithm for overcoming the inherent initial value instability encountered while numerically integrating transmission line equations is described. The method is directly compatible with the piecewise decomposition technique (PDT) and can be extended to interconnect networks with nonlinear terminations. Further speed up can be achieved by using parallel processors. Examples and comparisons with published results are presented.> Sanjay L. Manney, Michel S. Nakhla, Qi-Jun Zhang |
ICCAD | 2 |
| 1992 | Mixed frequency/time domain analysis of nonlinear circuitsabstractA method for the transient analysis of nonlinear circuits with frequency-dependent parameters is described. This method does not require numerical integration of differential equations. Applications include delay and crosstalk simulation of high-speed VLSI interconnects and simulation of nonlinear microwave circuits with parameters calculated or measured as a function of frequency. Examples and comparisons with previously published techniques are presented.> J. Richard Griffith, Michel S. Nakhla |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1992 | Analysis of high-speed VLSI interconnects using the asymptotic waveform evaluation techniqueabstractThe asymptotic waveform evaluation (AWE) technique provides a generalized approach to lumped RLC circuit response approximations. Two results are described: (1) generalization of the AWE method to handle interconnect models which contain distributed elements; and (2) application of the generalized AWE technique to the case where the distributed elements can be modeled as lossy coupled transmission lines. The generalized AWE technique is useful for delay and crosstalk estimation and can be used to evaluate transient responses of high-speed interconnect circuits with negligible error compared with conventional circuit simulators, while being two to three orders of magnitude faster.> Tak K. Tang, Michel S. Nakhla |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1991 | Delay and Crosstalk Simulation of High-Speed VLSI Interconnects with Nonlinear TerminationsabstractA method is presented for analysis of VLSI interconnects which contain both lossy coupled transmission lines and nonlinear components. An equivalent time domain macromodel is derived for the lossy coupled transmission line. The macromodel takes the form of a set of ordinary differential equations. The method takes full advantage of the asymptotic waveform evaluation technique which offers two to three orders of magnitude speedup relative to other methods with comparable accuracy. Computational results are presented for two examples: an interconnect circuit which contains lossless transmission lines and nonlinear components and a circuit consisting of two lossy coupled transmission lines.> Dong H. Xie, Michel S. Nakhla |
ICCAD | 2 |
| 1990 | Analysis of High-Speed VLSI Interconnects Using the Asymptotic Waveform Evaluation TechniqueabstractA generalization of the asymptotic waveform evaluation method to handle interconnect models which contain distributed elements is described. As an example, analysis of lossy coupled transmission lines is considered. The method is useful for both delay and crosstalk estimation.> Tak K. Tang, Michel S. Nakhla |
ICCAD | 2 |
| 1990 | Performance Evaluation of Optical Fiber Transmission SystemsabstractA method is presented for evaluating of error probability for optical-fiber communication systems in the present of intersymbol interference and additive noise. It is based on deriving a best approximation, in a minimax sense, for the cumulative distribution function of the additive noise. The method takes into account the avalanche photodetector's non-Gaussian shot noise statistics. The additive noise is also not constrained to be Gaussian. Examples are presented for comparison to previously published techniques.> Michel S. Nakhla |
IEEE J. Sel. Areas Commun. | 1 |
| 1982 | Analysis of a TASI System Employing Speech StorageabstractThis paper presents a performance analysis of a PLC-1 private line voice concentrator which uses speech interpolation to increase the capacity of transmission facilities. The PLC-1 employs speech storage. As a result it can be applied to relatively small trunk groups where statistics of loading patterns are particularly unfavorable. Speech impairments can be categorized as delay, gap modulation, and clipping. A mathematical model based on queueing theory is presented for the evaluation of the statistics of these impairments. The model can be used to determine obtainable TASI advantage for various system configurations and loading conditions. It is shown that a TASI advantage of two is achievable with 24 transmission facilities. The veracity of the queueing model is established using simulation techniques. Michel S. Nakhla, David H. A. Black |
IEEE Trans. Commun. | 1 |