Memory bandwidth between external memory and motion estimation core is a serious problem for HEVC real-time encoder. In this paper, a motion estimation algorithm based on memory bandwidth has been proposed. The proposed algorithm enables efficient motion estimation under the limitation of memory bandwidth.

This paper devises a real-time face object extraction algorithm for moving pictures. Considering that most of the existing object extraction algorithms are of too intensive computational complexity to enable the real-time execution that is applied to mobile video phone run on an embedded processor, this algorithm intends not only to reduce the computational complexity by employing modified snake but also to improve the precision of extracting pixels by an efficient estimation mechanism of the skin color portion within a face object. Simulation results demonstrate that by this algorithm QCIF 15fps is processed on a StrongARM processor in real-time.

In this paper, the VLSI implementation of a real-time EZW video coder is presented. The proposed architecture adopts a modified 2-D DWT subband decomposition scheme, with the purpose of reducing the transposition memory requirements of 2-D DWT. In addition, through the use of a parallelized partial zerotree EZW scheme, temporary buffer requirements between the DWT and EZW modules are also reduced. The video encoder is integrated in a 0.35 um 3LM chip by using 341 K transistors on a 4.93 x 4.93 mm2 die.

A VLSI implementation of the H.324 audiovisual codec is described. A number of sophisticated low-power architectures have been devised dedicatedly for the mobile use. A set of specific functional units, each corresponding to a process of H.263 video codec, is employed to lighten different performance bottlenecks. A compact DSP core composed of two MAC units is used for both ACELP and MP-MLQ coding schemes of the G.723.1 speech codec. The proposed audiovisual codec core has been implemented by using 0.35 /spl mu/m CMOS 4LM technology, which contains totally 420 K transistors with the dissipation of 224.32 mW from single 3.3 V supply.

Article Free Access Share on Low-power H.263 video CoDec dedicated to mobile computing Authors: Morgan H. Miki Dept. Information Systems Engineering, Osaka University Dept. Information Systems Engineering, Osaka UniversityView Profile , Gen Fujita Dept. Information Systems Engineering, Osaka University Dept. Information Systems Engineering, Osaka UniversityView Profile , Takao Onoye Dept. Information Systems Engineering, Osaka University Dept. Information Systems Engineering, Osaka UniversityView Profile , Isao Shirakawa Dept. Information Systems Engineering, Osaka University Dept. Information Systems Engineering, Osaka UniversityView Profile Authors Info & Claims ISLPED '97: Proceedings of the 1997 international symposium on Low power electronics and designAugust 1997 Pages 80–83https://doi.org/10.1145/263272.263288Published:01 August 1997Publication History 1citation333DownloadsMetricsTotal Citations1Total Downloads333Last 12 Months5Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF