Thispaper presents the Snapshot Method, a technique that fills a void in existing synthesis systems by considering inter-instruction data dependencies while defining a pipeline structure.These dependencies can make it impossible to overlap the execution of some sequences of instructions thus the detection and resolution of such sequences is an important contribution of this work.Experimental results for a design of the IBM ROMP architecture are presented.

We present a single high level synthesis algorithm that schedules the operations of a data dependence graph, allocates the necessary hardware, and maps the operations to specific functional units. This is achieved by extending the global analysis approach developed for force-directed scheduling to include individual module instances. This new algorithm should be applicable to any behavioral synthesis system that schedules operations from a data dependence graph.

This paper focuses on automatic synthesis of digital hardware from a behavioral description. Algorithms have been written and tested to perform automatic generation of control hardware and optimized microcode for specified data paths. The optimization algorithms produce a family of results based on cost and speed constraints supplied by the user. The algorithms adapt to these constraints and adjust the amount of parallelism in the synthesized microcode accordingly. Tests were run by generating microcode for a PDP-11/40. Results compared favorably with the human design.