VLDB 2026 Research / reviewers in the wild / expert
Satoshi Nakamura 0004
dblp:57/1548-4
· DBLP profile ↗
6ranked-venue papers
3as first author
3since 2021 · last 2022
0000-0002-7542-8859ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 3 · 1 first-author · 1 since 2021Theory of computation · 2 · 2 first-author · 2 since 2021Systems, architecture and hardware · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Solving the search-LWE problem over projected lattices
Satoshi Nakamura 0004, Nariaki Tateiwa, Masaya Yasuda, Katsuki Fujisawa |
Discret. Appl. Math. | 1 |
| 2021 | An Extension of Kannan's Embedding for Solving Ring-Based LWE Problems
Satoshi Nakamura 0004, Masaya Yasuda |
IMACC | 1 |
| 2021 | Dynamic self-dual DeepBKZ lattice reduction with free dimensions and its implementation
Satoshi Nakamura 0004, Masaya Yasuda |
Discret. Appl. Math. | 1 |
| 2020 | Massive parallelization for finding shortest lattice vectors based on ubiquity generator frameworkabstractLattice-based cryptography has received attention as a next-generation encryption technique, because it is believed to be secure against attacks by classical and quantum computers. Its essential security depends on the hardness of solving the shortest vector problem (SVP). In the cryptography, to determine security levels, it is becoming significantly more important to estimate the hardness of the SVP by high-performance computing. In this study, we develop the world’s first distributed and asynchronous parallel SVP solver, the MAssively Parallel solver for SVP (MAP-SVP). It can parallelize algorithms for solving the SVP by applying the Ubiquity Generator framework, which is a generic framework for branch-and-bound algorithms. The MAP-SVP is suitable for massive-scale parallelization, owing to its small memory footprint, low communication overhead, and rapid checkpoint and restart mechanisms. We demonstrate its performance and scalability of the MAP-SVP by using up to 100,032 cores to solve instances of the Darmstadt SVP Challenge. Nariaki Tateiwa, Yuji Shinano, Satoshi Nakamura 0004, Akihiro Yoshida, Shizuo Kaji, Masaya Yasuda, Katsuki Fujisawa |
SC | 3 |
| 2020 | Analysis of DeepBKZ reduction for finding short lattice vectors
Masaya Yasuda, Satoshi Nakamura 0004, Junpei Yamaguchi |
Des. Codes Cryptogr. | 2 |
| 2020 | Impact of the modulus switching technique on some attacks against learning problemsabstractThe modulus switching technique has been used in some cryptographic applications as well as in cryptanalysis. For cryptanalysis against the learning with errors (LWE) problem and the learning with rounding (LWR) problem, it seems that one does not know whether the technique is really useful or not. This work supplies a complete view of the impact of this technique on the decoding attack, the dual attack and the primal attack against both LWE and LWR. For each attack, the authors give the optimal formula for the switching modulus. The formulas get involved the number of LWE/LWR samples, which differs from the known formula in the literature. They also attain the corresponding sufficient conditions saying when one should utilise the technique. Surprisingly, restricted to the LWE/LWR problem that the secret vector is much shorter than the error vector, they also show that performing the modulus switching before using the so‐called rescaling technique in the dual attack and the primal attack make these attacks worse than only exploiting the rescaling technique as reported by Bai and Galbraith at the Australasian conference on information security and privacy (ACISP) 2014 conference. As an application, they theoretically assess the influence of the modulus switching on the LWE/LWR‐based second round NIST PQC submissions. Huy Quoc Le, Satoshi Nakamura 0004, Koha Kinjo, Dung Hoang Duong, Masaya Yasuda |
IET Inf. Secur. | 3 |