The watershed transform is a powerful tool for morphological segmentation. Most common implementations of this method involve a strict hierarchy on gray tones in processing the pixels composing an image. Those dependencies complexify the efficient use of modern computational architectures. This paper aims at answering this problem by introducing a new way of simulating the waterflood that alleviates the sequential nature of hierachical queue propagation. Simultaneous and disorderly growth is made possible using this method. higher speed is reached and bigger data volume can be processed. Experimental results show that the algorithm is accurate and produces a thin, well centered watershed line.

This paper addresses the problem of region-based color correction. Our solution begins with the image segmentation by marker-controlled watershed transformation, which is faster and produces more uniform regions with better adherence to object boundaries than the segmentation in previous works. Next, regions between two images are matched using point feature correspondences which are invariant to geometric transformation and illumination changes. Finally, the color-corrected image is generated from the color transfer functions of corresponding regions. We demonstrate the results of this approach using different sets of images.

This paper presents a fast, one-scan algorithm for 1-D morphological opening on 2-D support. The algorithm is further extended to compute the pattern spectrum during a single image scan. The structuring element (SE) can be oriented under arbitrary angle that makes it possible to perform different orientation-involved image analysis, such as the local angle extraction, directional granulometry, etc. The algorithm processes an image in constant time regardless the SE orientation and size in one scan, with minimal latency and very low memory requirements. For pattern spectra, the C-implementation yields an experimental speed-up of 27× compared to other suitable solutions. Aforementioned properties allow for efficient implementation on hardware platforms such as GPU or FPGA that opens a new opportunity of parallel computation, and consequently, further speed-up.