VLDB 2026 Research / reviewers in the wild / expert
Gail A. Alverson
dblp:58/2427
· DBLP profile ↗
6ranked-venue papers
6as first author
0since 2021 · last 1998
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 5 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Parallel and multicore computing · 82% Processor architecture and microarchitecture · 13% Distributed systems · 5% | |
| Software engineering, system software, and programming languages
2 papers |
Compilers and program optimization · 72% Software maintenance and evolution · 28% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing
parallel programming models |
0.1 | 4 | 1998 | Abstractions for Portable, Scalable Parallel Programming · IEEE Trans. Parallel Distributed Syst. 1998 Tera Hardware Software Cooperation · SC 1997 Program Structuring for Effective Parallel Portability · IEEE Trans. Parallel Distributed Syst. 1993 |
Parallel and multicore computing › parallel programming models
portable parallel programming |
0.0 | 2 | 1998 | Abstractions for Portable, Scalable Parallel Programming · IEEE Trans. Parallel Distributed Syst. 1998 Program Structuring for Effective Parallel Portability · IEEE Trans. Parallel Distributed Syst. 1993 |
Processor architecture and microarchitecture
multithreading |
0.0 | 1 | 1997 | Tera Hardware Software Cooperation · SC 1997 |
Parallel and multicore computing › parallel programming models
shared-memory parallelization |
0.0 | 1 | 1997 | Tera Hardware Software Cooperation · SC 1997 |
Distributed systems › distributed programming
communication abstraction |
0.0 | 1 | 1990 | A flexible communication abstraction for nonshared memory parallel computing · SC 1990 |
Compilers and program optimization › parallel program optimization
compiler optimization for parallel architectures |
0.0 | 1 | 1997 | Tera Hardware Software Cooperation · SC 1997 |
Software maintenance and evolution › software reengineering › software modernization › software migration
software porting |
0.0 | 1 | 1990 | A flexible communication abstraction for nonshared memory parallel computing · SC 1990 |
Methods — techniques the papers use, named apart from their topics
component-based programming model · 0.0port ensemble · 0.0prototype implementation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1998 | Abstractions for Portable, Scalable Parallel ProgrammingabstractIn parallel programming, the need to manage communication, load imbalance, and irregularities in the computation puts substantial demands on the programmer. Key properties of the architecture, such as the number of processors and the cost of communication, must be exploited to achieve good performance, but coding these properties directly into a program compromises the portability and flexibility of the code because significant changes are then needed to port or enhance the program. We describe a parallel programming model that supports the concise, independent description of key aspects of a parallel program-including data distribution, communication, and boundary conditions-without reference to machine idiosyncrasies. The independence of such components improves portability by allowing the components of a program to be tuned independently, and encourages reuse by supporting the composition of existing components. The isolation of architecture-sensitive aspects of a computation simplifies the task of porting programs to new platforms. Moreover, the model is effective in exploiting both data parallelism and functional parallelism. This paper provides programming examples, compares this work to related languages, and presents performance results. Gail A. Alverson, William G. Griswold, Calvin Lin, David Notkin, Lawrence Snyder 0001 |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1997 | Tera Hardware Software CooperationabstractThe development of Tera's MTA system was unusual. It respected the need for fast hardware and large shared memory, facilitating execution of the most demanding parallel application programs. But at the same time, it met the need for a clean machine model enabling calculated compiler optimizations and easy programming; and the need for novel architectural features necessary to support fast parallel system software. From its inception, system and application needs have molded the MTA architecture. The result is a system that offers high performance and ease of programming by virtue not only of fast physical hardware and flat shared memory, but also of the streamlined software systems that well utilize the features of the architecture intended to support them. Gail A. Alverson, Preston Briggs, Susan Coatney, Simon Kahan, Richard Korry |
SC | 1 |
| 1995 | Scheduling on the Tera MTA
Gail A. Alverson, Simon Kahan, Richard Korry, Cathy McCann, Burton J. Smith |
JSSPP | 1 |
| 1993 | Program Structuring for Effective Parallel PortabilityabstractThe tension between software development costs and efficiency is especially high when considering parallel programs intended to run on a variety of architectures. In the domain of shared memory architectures and explicitly parallel programs, the authors have addressed this problem by defining a programming structure that eases the development of effectively portable programs. On each target multiprocessor, an effectively portable program runs almost as efficiently as a program fine-tuned for that machine. Additionally, its software development cost is close to that of a single program that is portable across the targets. Using this model, programs are defined in terms of data structure and partitioning-scheduling abstractions. Low software development cost is attained by writing source programs in terms of abstract interfaces and thereby requiring minimal modification to port; high performance is attained by matching (often dynamically) the interfaces to implementations that are most appropriate to the execution environment. The authors include results of a prototype used to evaluate the benefits and costs of this approach.> Gail A. Alverson, David Notkin |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1992 | Exploiting heterogeneous parallelism on a multithreaded multiprocessorabstractThis paper describes an integrated architecture, compiler, runtime, and operating system solution to exploiting heterogeneous parallelism. The architecture is a pipelined multi-threaded multiprocessor, enabling the execution of very fine (multiple operations within an instruction) to very coarse (multiple jobs) parallel activities. The compiler and runtime focus on managing parallelism within a job, while the operating system focuses on managing parallelism across jobs. By considering the entire system in the design, we were able to smoothly interface its four components. While each component is primarily responsible for managing its own level of parallel activity, feedback mechanisms between components enable resource allocation and usage to be dynamically updated. This dynamic adaptation to changing requirements and available resources fosters both high utilization of the machine and the efficient expression and execution of parallelism. Gail A. Alverson, Robert Alverson, David Callahan, Brian D. Koblenz, Allan Porterfield, Burton J. Smith |
ICS | 1 |
| 1990 | A flexible communication abstraction for nonshared memory parallel computingabstractIt is shown how a communication abstraction called the port ensemble can simplify the handling of boundary conditions and the efficient porting of programs. A port ensemble provides an explicit interface between computation and communication descriptions, thus separating the communication structure from the details of local computation and from the compiler. Port ensembles structure ports, symbolic names to and from which process can write and read values. To simplify the expression of boundary conditions, ports can be bound not only to ports on other processors, but also to nonexistent neighbors (along the edge of the computation) using special objects that represent and implement constants, variables, and arbitrary functions. Port ensembles also provide direct access to the communication structure, which simplifies changing the structure to one appropriate for a new target architecture.> Gail A. Alverson, William G. Griswold, David Notkin, Lawrence Snyder 0001 |
SC | 1 |