A DVB-S2 compliant codec is implemented in both 130nm-8M and 90nm-7M low-leakage CMOS technologies. The system includes encoders and decoders for both Low-Density Parity Check (LDPC) codes and serially concatenated BCH codes. All requirements of the DVB-S2 standard are supported including code rates between 1/4 and 9/10, block sizes of either 16,200 bits or 64,800 bits, and four digital modulation options. The 130nm core design occupies 49.6mm2 and operates at 200MHz, while the 90nm core design occupies 15.8mm2 and operates at 300MHz.

Electronic product catalogues (EPCs) are a class of complex event driven multimedia information systems. A software engineering model was developed in the EPK-fix project to construct and test EPCs on the basis of formal specifications. With reference to the specification a whitebox-based test technology is supported by a test assistant. The dynamic analysis prerequisites the production of an interpretable dynamic model to simulate states and transitions of an EPC discretely. A test agent controls both the model and the EPC. Formal proof techniques are employed to detect violations against formalized design guidelines. Both formulation and formalization of design rules are demonstrated by example. A horn clause interpreter is used to prove the observance of design rules in state configurations of the EPC. Error detection by formal proofs enhances the test process.