VLDB 2026 Research / reviewers in the wild / expert
Nick Michell
dblp:59/1236
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
1 paper |
Logic in computer science · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 1 | 1994 | A correctness criterion for asynchronous circuit validation and optimization · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Logic in computer science › concurrency theory
conformance relation |
0.0 | 1 | 1994 | A correctness criterion for asynchronous circuit validation and optimization · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Logic in computer science › concurrency theory
trace theory |
0.0 | 1 | 1994 | A correctness criterion for asynchronous circuit validation and optimization · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Methods — techniques the papers use, named apart from their topics
trace theory · 0.0strong conformance · 0.0model checking · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | A correctness criterion for asynchronous circuit validation and optimizationabstractIn order to reasonably determine the correctness of asynchronous circuit implementations and specifications, Dill (1989) has developed a variant of trace theory. Trace theory describes the behavior of an asynchronous circuit by representing its possible executions as strings, called "traces." A useful relation defined in this theory is called conformance, which holds when one trace specification can be safely substituted for another. We propose a new relation in the context of Dill's trace theory, called strong conformance. We show that this relation is capable of detecting certain errors in asynchronous circuits that cannot be detected through conformance. Strong conformance also helps to justify circuit optimization rules where a component is replaced by another component having extra capabilities (e.g., it can accept more inputs). The structural operators of Dill's trace theory-compose, rename, and hide-are shown to be monotonic with respect to strong conformance. Experiments are presented using a modified version of Dill's trace theory verifier that implements a check for strong conformance.> Ganesh Gopalakrishnan, Erik Brunvand, Nick Michell, Steven M. Nowick |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 1992 | A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs TechnologiesabstractThe authors explore one approach to self-timed design and describe implementations of an example circuit in three different technologies. The simple routing chip, used as the example has been described by writing a program in OCCAM, translated into a circuit consisting of a small set of basic modules, and implemented using Actel FPGA (field-programmable gate array), CMOS, and GaAs technologies. These technologies represent a wide range of price and performance characteristics.> Erik Brunvand, Nick Michell, Kent F. Smith |
ICCD | 2 |