One of the greatest challenges in the embedded systems area is to empower software developers with tools that speed up the debugging of QoS properties in applications. Typical streaming applications, such as multimedia (audio/video) decoding, fulfill the QoS properties by respecting the real-time deadlines. A perfectly functional application, when missing these deadlines, may lead to cracks in the sound or perceptible artifacts in the image. We start from the premise that most of the streaming applications that run on embedded systems can be expressed under a data ow model of computation, where the application is represented as a directed graph of the data flowing through computational units called actors. It has been shown that in order to meet real-time constraints the actors should be scheduled in a periodic manner. We exploit this property to propose SATM - a novel approach based on data mining techniques that automatically analyzes execution traces of streaming applications, and discovers significant breaks in the periodicity of actors, as well as potential causes of these breaks. We show on a real use case that our debugging approach can uncover important defects and pinpoint their location to the application developer.

The analysis of multimedia application traces can reveal important information to enhance program execution comprehension. However typical size of traces can be in gigabytes, which hinders their effective exploitation by application developers. In this paper, we study the problem of finding a set of sequences of events that allows a reduced-size rewriting of the original trace. These sequences of events, that we call blocks, can simplify the exploration of large execution traces by allowing application developers to see an abstraction instead of low-level events.

Increasing complexity in both the software and the underlying hardware, and ever tighter time-to-market pressures are some of the key challenges faced when designing multimedia embedded systems. Optimizing the debugging phase can help to reduce development time significantly. A powerful approach used extensively during this phase is the analysis of execution traces. However, huge trace volumes make manual trace analysis unmanageable. In such situations, Data Mining can help by automatically discovering interesting patterns in large amounts of data. In this paper, we are interested in discovering periodic behaviors in multimedia applications. Therefore, we propose a new pattern mining approach for automatically discovering all periodic patterns occurring in a multimedia application execution trace.

Observing the execution of MPSoC is a key activity in debugging and optimizing embedded applications. However, providing suitable observation tools becomes a real challenge with the fast evolution of embedded platforms. We propose a generic component-based approach which allows for partial and configurable MPSoC observation. Genericity is obtained by encapsulating specific embedded features and exporting a generic observation API. Partial observation is achieved by instantiating and attaching observation components only to the entities of interest: application modules, HW components or different levels of the SW stack. Configurability is related to the possibility to organize and parametrize observation treatments (data collection, filtering, storing) according to the target system. The approach has been validated in several application and platform contexts including an embedded platform built by STMicroelectronics.

Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lock-based concurrency mechanisms. It offers a higher-level programming interface and promises to greatly simplify the development of correct concurrent applications on multicore architectures. However, simplicity often comes with an important performance deterioration and given the variety of TM implementations it is still a challenge to know what kind of applications can really take advantage of TM. In order to gain some insight on these issues, helping developers to understand and improve the performance of TM applications, we propose a generic approach for collecting and tracing relevant information about transactions. Our solution can be applied to different Software Transactional Memory (STM) libraries and applications as it does not modify neither the target application nor the STM library source codes. We show that the collected information can be helpful in order to comprehend the performance of TM applications.

In the context of embedded systems such as cell-phones, PDA or cars and planes software, optimizations of code are required because of timing and memory constraints imposed. Many problems arise when trying to debug optimized code. One of them is the irrelevance of the mapping between the source code and the optimized target program: the Code Location Problem. This paper proposes a solution to this problem in the case of highly optimized code in the context of embedded systems.

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This paper describes the FlexCC2 register allocation framework. FlexCC2 is an optimizing retargetable C compiler for embedded processors, and in particular for DSP processors. Embedded processors often contain features such as irregular and constrained register sets that complicate register allocation, making traditional methods inefficient. In this paper, we present a register allocation framework specifically tailored for embedded processor specificities. This framework has been integrated in the FlexCC2 production compiler and is used by FlexCC2 customers.

This paper outlines a case study at SGS-Thomson Microelectronicson the development of a firmware development environment in co-operationwith Thomson Consumer Electronics Components. Theenviornment is for an embedded processor used for audiodecompression algorithms including: MPEG2, Dolby AC-3 Surround,and Dolby Pro-logic. The enabling component of the firmwareenvironment is a retargetable compiler which maps high-levelalgorithms onto the embedded processor. Although compilation is thecritical technology, this experience has shown that it is insufficient andthat other supporting design tools are also important. For this project,that environment includes an instruction-set simulator, a source-leveldebugger, a custom linker, and a compiler validation strategy. Themethodologies are outlined in this paper with an emphasis on thelessons learned in this hardware-software team development.

In spite of growing needs in many areas, there is a lack of powerful graphical interfaces for interacting with large and complex sets of objects. Debugging, management and monitoring tools for object-oriented distributed systems or databases, for instance, need new interfaces that allow high quality visualization and interaction.