In deep face recognition, the commonly used softmax loss and its newly proposed variations are not yet sufficiently effective to handle the class imbalance and softmax saturation issues during the training process while extracting discriminative features. In this brief, to address both issues, we propose a class-variant margin (CVM) normalized softmax loss, by introducing a true-class margin and a false-class margin into the cosine space of the angle between the feature vector and the class-weight vector. The true-class margin alleviates the class imbalance problem, and the false-class margin postpones the early individual saturation of softmax. With negligible computational complexity increment during training, the new loss function is easy to implement in the common deep learning frameworks. Comprehensive experiments on the LFW, YTF, and MegaFace protocols demonstrate the effectiveness of the proposed CVM loss function.

In this paper, we propose an efficient approach to minimize the noise on power networks via the allocation of decoupling capacitors (decap) and controlled equivalent series resistors (ESR). The controlled-ESR is introduced to reduce the on-chip power voltage fluctuation, including both voltage drop and overshoot. We formulate an optimization problem of noise minimization with the constraint of decap budget. A revised sensitivity calculation method is derived to consider both voltage drop and overshoot. The sequential quadratic programming (SQP) algorithm is adopted to solve the optimization problem where the revised sensitivity is regarded as the gradient. Experimental results show that considering voltage drop without overshoot leads to underestimating noise by 4.8%. We also demonstrate that the controlled-ESR is able to reduce the noise by 25% with the same decap budget.

With the popularity of multiple power domain (MPD) design, the multi-domain power network noise analysis and minimization is becoming important. This paper describes an efficient heuristic algorithm to arrange the power-up sequence in a multi-domain power network in order to minimize the noise. We present a formulation of this problem and show it is NP-complete. Therefore, we propose a simulated annealing (SA) based algorithm with preprocessing. Experimental results show that the proposed algorithm can minimize the noise close to the minimal values. In terms of efficiency, the SA algorithm is more than hundreds of times faster than the enumerating method and the running time scales well for these cases with the number of domains. In addition, we discuss the trade off between power-up efficiency and noise.

Reliable design of power distribution network for stacked integrated circuits introduces new challenges i.e., substrate coupling among through silicon vias (TSVs) and tiers grid in addition to reliability issues such as electromigration and thermo-mechanical stress, compared to conventional system on chip (SoC). In this paper a comprehensive modeling of the TSV and stacked power grid with frequency dependent parasitic is proposed. The analytical model considers the impact of the substrate coupling between the TSVs and layers grid. A frequency domain based analysis flow is introduced to incorporate frequency dependent parasitics. The design of a reliable power distribution network is formulated as an optimization problem to minimize power noise under reliability and electro-migration constraints. Experimental results demonstrate the efficacy of the problem formulation and solution technique.

In this paper, an efficient framework is proposed to analyze the worst case of voltage variation of power network considering multidomain clock gating. First, a frequency-domain-based simulation method is proposed to obtain the time-domain voltage response. With the vector fitting technique, the frequency-domain responses are approximated by a partial fraction expression, which can be easily converted to a time-domain waveform. Then, an algorithm is proposed to find the worst-case voltage variation and corresponding clock gating patterns, through superimposing the voltage responses caused by all domains working separately. The major computation of the whole framework is solving the frequency-domain equation system, whose complexity is about$O(N^{\alpha}D\log f_{\max})$, where$\alpha$is between one and two if using an iterative solver from the PETSc library.$N$is the node number,$f_{\max}$is the upper bound of frequency, and$D$is the number of clock domains. Numerical results show that the proposed simulation method is up to several hundred times faster than commercial fast simulators, like HSPICE and MSPICE. In addition, the proposed method is able to analyze large-scale power networks that the commercial tools are not able to afford.

This paper proposes an efficient method to find the worst case of voltage violation by multi-domain clock gating in an on-chip power network. We first present a voltage response in an arbitrary multi-domain clock gating pattern, using a superposition technique. Then, an integer linear programming (ILP) formulation is proposed to identify the worst-case gating pattern and the maximum variation area. The ILP based method is significantly faster than a conventional method based on enumeration. The experimental results are also compared with a case where peak voltage variation is induced, which shows the latter technique largely underestimated the overall variation effect.

This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transform on the input current sources to derive the analytical formula. Then, we calculate the circuit frequency response with logarithmic scale frequency components. The frequency domain response is approximated by a rational function using vector fitting modeling. The rational function is used to derive the natural frequency of the power ground networks, and can be converted back into time domain easily. Based on the analysis results, we then present the worst case clock gating pattern algorithm to analyze the power networks with multiple clock domains. The most expensive part of the proposed algorithm is the matrix solving: O(F(N) ldr log f ldr D). Function F is the complexity of iterative solution of complex matrix with dimension N. We assume that there are D clock domains and the frequency spans from 0 to f Hz. Experimental results show that our method is up to 60X faster than HSPICE, and can analyze large circuits which are not affordable by HSPICE.

One effective way to reduce power ground network noise is to add decoupling capacitors, but this method changes the impedance and natural frequency. Traditional simulation requires re-simulating the whole circuit, which is time-consuming. This paper presents a fast impedance curve and natural frequency computation algorithm, based on vector fitting modeling with incremental value of decap. The new method fits several sampling data in an impedance curve with a rational function. Therefore, the impedance at other frequencies would be easily interpolated. Moreover, vector fitting computes poles accurately and thus finds natural frequencies. Experiments show that the results of this method are accurate and the algorithm complexity is much lower than with traditional method.

We have developed a new approach to studying human heart activity using independent component analysis. The electrocardiogram (ECG) is an important tool in diagnosis of heart disease. However, the normal 12-lead ECG can only record limited aspects of heart's electrical signals and mostly their interpretation relies on trained and experienced medical doctors. We have performed experiments in which heart signals were recorded in high spatial resolution. Independent component analysis was applied to the recorded signals to separate distinct temporal components of the recorded signals. The separated components were further analyzed by back-projecting their activities to the surface montage to examine each component's property. Experimental results show this to be a promising approach that can be extended to build more detailed heart activity simulations