An analog-to-digital converter (ADC) architecture is described which utilizes mixing instead of high frequency sampling, and folds the input in frequency around harmonics of the mixing local oscillator. The frequency-folded input is separated in the digital domain, which enables significant dynamic range benefits. The frequency of the mixing local oscillator can be significantly smaller than the signal bandwidth, and hence the architecture is suitable for high-speed applications. The architecture is verified through system level simulation and the impact of non-idealities on performance is considered. The design is observed to have a reduced timing skew requirement compared to time-interleaved ADCs.

A Cartesian transmitter based on pulse width modulation, with the capability to drive a switched power amplifier, such as a Class D stage, is presented. A phase-locked loop based technique is proposed to generate a high frequency pulse width modulated signal with a 1.28 GHz carrier. This signal is subsequently upconverted and applied to the output stage. This technique does not require a ramp generator or a high-precision voltage comparator, that are typically employed in conventional pulse width modulators. A prototype is simulated in a 130 nm CMOS process, and achieves 35% peak efficiency for 17 dBm output power with a center frequency of 900 MHz. Operation of the architecture with modulation that has a non-constant envelope is verified in simulation.

A spectrum sensing technique based on cross correlation that can be applied to cognitive radios for detection of weak signals is described. It is known that by cross-correlating the outputs of two signal paths, which have independent noise and correlated signals, the sensitivity of the detector can be enhanced. An analog approach to cross-correlation is employed, which avoids the requirement for high dynamic range analog-to digital converters and digital FFT cores. Each signal path uses an integrated receiver to down-convert the desired portion of the spectrum to baseband for correlation. The use of two-step image reject down-converters is proposed to alleviate flicker noise and DC offset related degradation that arises in direct-conversion receivers. The impact of finite image rejection in the receivers is addressed and a solution based on offset local oscillator frequencies is proposed. The effectiveness of the approach is validated through simulation.

A Cartesian Feedback-Feedforward Transmitter for improving the linearity of the transmit path for high-data rate communications is described. A Volterra Series representation is used to analyze the linearity of the architecture. System simulations are used to demonstrate linearity enhancements achieved through a combination of feedback and feedforward.

This paper presents a new method for testing radio frequency (RF) receivers that utilizes a multitone digital signal generation scheme and relies on the analysis of the receiver baseband output to compute the RF performance parameters. The proposed method takes out the cost of expensive RF instrumentation on the input side of receiver testing and only requires the less expensive baseband digitization at the receiver output. The complexity of the RF signal generation inherent to standard methods is traded off with extensive signal processing on the baseband side, with the tedious analysis necessary for tackling the problem being addressed and presented herein. While the proposed test scheme was implemented and experimentally verified on a load board for testing UHF receivers, generalized use in BIST applications in need of multi-GHz RF stimuli is also discussed in the paper. RF performance parameters like Gain, Noise Figure (NF), and IIP3 were measured using both standard methods and the proposed method and, the results are shown to be accurate.

This paper develops a technique, using a built-in detector, for measuring the specifications of RF subsystems and fine-tuning them with a feedback control algorithm. At the same time, optimum power consumption points can be chosen from different biasing schemes. The detector has small area overhead with low frequency output. The sampled output waveform is analyzed using an FFT. The low frequency measurements are directly used to calculate the circuit specifications, without requiring learning steps. The technique was used to measure the performance parameters of a 940 MHz to 40 MHz down conversion mixer in a RF receiver front-end test chip, fabricated in a commercial 0.18 mum CMOS process. The tuning algorithm was implemented in the Labview environment, and tuning knobs on board were used for biasing and control optimization. Results show that the approach can provide accurate calibration of specifications and power for real RF chips.

This paper describes the theory and chip measurements of a built-in test technique for RF receivers which uses simple RF amplitude detectors. The method has been used to measure the performance parameters of a 940 MHz RF receiver front-end with a mixer and LNA. The detector has small area overhead with low frequency output. The sampled output waveform is analyzed using an FFT, and the low frequency measurements are used to deduce the conversion gain and Third Order Intercept point (TOI, IIP3) of the receiver. A test chip was fabricated in a commercial 0.18 mum CMOS process. By using two detectors, both the system performance and specifications of discrete components have been accurately measured. Measurement results show accurate prediction of system and component specifications.

A new green function-based method for extracting parasitics in inhomogeneous substrates is presented. This approach overcomes the limitation of prior green function-based methods and allows extraction of substrate parasitics in the presence of sinkers, trenches, and wells. A careful use of volume and boundary-element meshing, as well as discrete transforms, yields a technique that is computationally efficient. The accuracy of the method is comparable to that of 3-D semiconductor device simulators with significantly smaller computational costs.

A low-power receiver demodulator is presented in which the input mixer provides conversion gain and baseband amplification by recycling the IF signals through the input amplification devices. A specific implementation that utilizes this approach is described and simulation results in a 90 nm CMOS technology are presented. An effective conversion gain that can be varied from 5 dB to a peak gain of 52 dB is achieved in simulation, with a current dissipation of 3 mA from a 1.2 V supply. The circuit achieves an output 1-dB compression point greater than 0.79 V at peak gain and a noise figure of 10.7 dB in simulation. The down-converter provides quadrature outputs.

We present a broadband digital pulse generation technique for use in ultra-wideband pulse radio transceivers. The pulse shape and frequency spectrum is digitally controlled. A quadrature-DAC based transmitter architecture is used to achieve reduction of the sampling images. A pulse generator test-chip fabricated in a 0.25 mum BiCMOS process is reported and generates broadband pulses in the public safety band (below 800 MHz)

This paper presents a new Green function-based approach for substrate parasitic extraction in substrates with inhomogeneous layers. This new formulation allows analysis of noise coupling with sinkers, trenches and wells, - a limitation in prior Green function-based extractors. Numerical examples for sinkers and trenches are provided and compared with the results from threedimensional semiconductor device simulations. It is shown that the proposed method is accurate and computationally efficient.

Several methods are presented for highly efficient calculation of substrate noise transport in integrated circuits. A three-dimensional Green's function-based boundary element method, accelerated through use of the fast Fourier transform, allows the computation of sensitivities with respect to all substrate parameters at a considerably higher speed than any methods reported in the literature. Substrate sensitivities are used in a number of physical optimization tools, such as placement and trend analysis. The aim is a fast and accurate estimation of the impact of technology migration and/or layout redesign on substrate noise and, ultimately, on the circuit's overall performance. The suitability of the approach is shown through industrial-strength mixed-mode integrated circuits fabricated on a standard CMOS process.

The Green function over a multilayer substrate is derived by solving Poisson's equation analytically in the coordinate and numerically in the z and y coordinates. The x and y functional dependence is transformed into a discrete cosine transform (DCT) representation for rapid evaluation. The Green function is further transformed into a numerically stable form appropriate for finite-precision machine evaluation. This Green function is used to solve for the impedance matrix for an arbitrary three-dimensional arrangement of conductors placed anywhere in the substrate. Using this technique, the substrate coupling and loss in IC circuits can be analyzed. A spiral inductor is presented as an example. Experimental measurement results verify the accuracy of the technique.

A semi-analytical technique for computation of the frequency-behavior of silicon substrates is demonstrated. The technique uses a boundary element approach, that utilizes the complex substrate Green Function and the two-dimensional Fast Fourier Transform. The resultant dense system matrix is sparsified by application of orthogonal transform operators on the matrix representing the system. Three transform operators are evaluated for this purpose- the Discrete Cosine Transform (DCT), the Discrete Wavelet Transform (DWT) and the Discrete Hadamard Transform (DHT). The application of any one of these operators provides a rigorous sparsification technique, which significantly reduces the computation time. The Green Function is computed in the two layers at the top of the substrate. This is done so that contacts in the oxide layer can be included in the substrate model, along with contacts in the silicon substrate. Hence, substrate loss terms in metal interconnect lines and in line-to-line interaction models, can be evaluated using this technique. Extraction of a simple circuit-simulator compatible model from frequency-domain data is discussed.

A number of methods are presented for highly efficient calculation of substrate current transport. A three-dimensional Green's Function based substrate representation, in combination with the use of the Fast Fourier Transform, significantly speeds up the computation of sensitivities with respect to all parameters associated with a given architecture. Substrate sensitivity analysis is used in a number of physical optimization tools, such as placement and trend analysis for the estimation of the impact of technology migration and/or layout re-design.