This paper describes an approximate routing procedure. The procedure is quite general and could be applied to both printed circuit boards and integrated circuit chip wiring procedures where a hierarchical wiring scheme is utilized. This procedure has been incorporated in sperry's automatic gate array chip layout system.

This paper presents a straightforward approach to determining how best to utilize an MIMD multiprocessor in the solution of one-dimensional optimization problems involving continuous unimodal functions and nongradient search techniques. A methodology is presented which allows one to consider a variety of speedup functions which may occur in parallel function and systems evaluation. It is shown how the best of two parallel optimization strategies can be determined for a given accuracy, number of processors, and speedup function.

This paper contributes to the understanding of program structure in terms of stability and reliability in a quantitative sense. Distinctions are made between program structure and control structure.