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Robert Lyerly

dblp:60/10663 · DBLP profile ↗
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13ranked-venue papers
5as first author
3since 2021 · last 2025
0000-0001-9452-2958ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 2 first-author · 2 since 2021Software engineering, systems software and programming languages · 3 · 2 first-author · 1 since 2021Security and privacy · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
6 papers
Distributed systems · 37% Parallel and multicore computing · 16% Cloud and datacenter computing · 15%
Software engineering, system software, and programming languages
1 paper
Runtime systems and virtual machines · 100%

Topics — the 18 heaviest of 19, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems › consistency models
bounded staleness
0.912025
Skybridge: Bounded Staleness for Distributed Caches · OSDI 2025
Memory systems
cache coherence
0.912025
Skybridge: Bounded Staleness for Distributed Caches · OSDI 2025
Distributed systems
consistency models
0.912025
Skybridge: Bounded Staleness for Distributed Caches · OSDI 2025
Distributed systems
distributed caching
0.912025
Skybridge: Bounded Staleness for Distributed Caches · OSDI 2025
Parallel and multicore computing › parallel programming runtimes
OpenMP runtime
0.512021
An OpenMP Runtime for Transparent Work Sharing across Cache-Incoherent Heterogeneous Nodes · ACM Trans. Comput. Syst. 2021
Parallel and multicore computing
parallel programming models and runtimes
0.512021
An OpenMP Runtime for Transparent Work Sharing across Cache-Incoherent Heterogeneous Nodes · ACM Trans. Comput. Syst. 2021
Embedded and real-time systems
energy-efficient embedded systems
0.412019
HEXO: Offloading HPC Compute-Intensive Workloads on Low-Cost, Low-Power Embedded Systems · HPDC 2019
Processor architecture and microarchitecture › multicore design
heterogeneous multicore
0.412019
Scheduling HPC workloads on heterogeneous-ISA architectures: poster · PPoPP 2019
Cloud and datacenter computing
resource management
0.412019
HEXO: Offloading HPC Compute-Intensive Workloads on Low-Cost, Low-Power Embedded Systems · HPDC 2019
Cloud and datacenter computing › virtualization › virtual machine management
server consolidation
0.412019
HEXO: Offloading HPC Compute-Intensive Workloads on Low-Cost, Low-Power Embedded Systems · HPDC 2019
Runtime systems and virtual machines
dynamic compilation
0.312018
AIRA: A Framework for Flexible Compute Kernel Execution in Heterogeneous Platforms · IEEE Trans. Parallel Distributed Syst. 2018
Distributed systems › remote execution
computation migration
0.312017
Breaking the Boundaries in Heterogeneous-ISA Datacenters · ASPLOS 2017
Cloud and datacenter computing › resource management
datacenter resource management
0.312017
Breaking the Boundaries in Heterogeneous-ISA Datacenters · ASPLOS 2017
Processor architecture and microarchitecture › multiprocessor architecture
heterogeneous-ISA
0.312017
Breaking the Boundaries in Heterogeneous-ISA Datacenters · ASPLOS 2017
Parallel and multicore computing › parallel scheduling
loop scheduling
0.112021
An OpenMP Runtime for Transparent Work Sharing across Cache-Incoherent Heterogeneous Nodes · ACM Trans. Comput. Syst. 2021
Cloud and datacenter computing › cluster resource management and scheduling
cluster resource management
0.112019
Scheduling HPC workloads on heterogeneous-ISA architectures: poster · PPoPP 2019
Parallel and multicore computing › parallel scheduling
runtime scheduling
0.112018
AIRA: A Framework for Flexible Compute Kernel Execution in Heterogeneous Platforms · IEEE Trans. Parallel Distributed Syst. 2018
Energy-efficient computing
datacenter energy efficiency
0.112017
Breaking the Boundaries in Heterogeneous-ISA Datacenters · ASPLOS 2017

Methods — techniques the papers use, named apart from their topics

compiler-runtime co-design · 0.7runtime scheduling · 0.5performance profiling · 0.5unikernel · 0.4scheduling policy · 0.4offloading · 0.4heterogeneous-ISA migration · 0.4cache coherency domain · 0.4
YearPublicationVenuePosition
2025 Skybridge: Bounded Staleness for Distributed Caches
Robert Lyerly, Scott Pruett, Kevin Doherty, Greg Rogers, Nathan Bronson, John Hugg
OSDI1
2024 HEXO: Offloading Long-Running Compute- and Memory-Intensive Workloads on Low-Cost, Low-Power Embedded Systems
abstract
OS-capable embedded systems exhibiting a very low power consumption are available at an extremely low price point. It makes them highly compelling in a datacenter context. We show that sharing long-running, compute-intensive datacenter workloads between a server machine and one or a few connected embedded boards of negligible cost and power consumption can yield significant performance and energy benefits. Our approach, named Heterogeneous EXecution Offloading (HEXO), selectively offloads Virtual Machines (VMs) from server-class machines to embedded boards. Our design tackles several challenges. We address the Instruction Set Architecture (ISA) difference between typical servers (x86) and embedded systems (ARM) through hypervisor and guest OS-level support for heterogeneous-ISA runtime VM migration. We cope with the low amount of resources in embedded systems by using lightweight VMs – unikernels – and by using the server's free RAM as remote memory for embedded boards through a transparent lightweight memory disaggregation mechanism for heterogeneous server-embedded clusters, called Netswap. VMs are offloaded based on an estimation of the slowdown expected from running on a given board. We build a prototype of HEXO and demonstrate significant increases in throughput (up to 67%) and energy efficiency (up to 56%) using benchmarks representative of compute-intensive long-running workloads.
Pierre Olivier, A. K. M. Fazla Mehrab, Sandeep Errabelly, Stefan Lankes, Mohamed Lamine Karaoui, Robert Lyerly, Sang-Hoon Kim, Antonio Barbalace, Binoy Ravindran
IEEE Trans. Cloud Comput.6
2021 An OpenMP Runtime for Transparent Work Sharing across Cache-Incoherent Heterogeneous Nodes
abstract
In this work, we present libHetMP , an OpenMP runtime for automatically and transparently distributing parallel computation across heterogeneous nodes. libHetMP targets platforms comprising CPUs with different instruction set architectures (ISA) coupled by a high-speed memory interconnect, where cross-ISA binary incompatibility and non-coherent caches require application data be marshaled to be shared across CPUs. Because of this, work distribution decisions must take into account both relative compute performance of asymmetric CPUs and communication overheads. libHetMP drives workload distribution decisions without programmer intervention by measuring performance characteristics during cross-node execution. A novel HetProbe loop iteration scheduler decides if cross-node execution is beneficial and either distributes work according to the relative performance of CPUs when it is or places all work on the set of homogeneous CPUs providing the best performance when it is not. We evaluate libHetMP using compute kernels from several OpenMP benchmark suites and show a geometric mean 41% speedup in execution time across asymmetric CPUs. Because some workloads may showcase irregular behavior among iterations, we extend libHetMP with a second scheduler called HetProbe-I. The evaluation of HetProbe-I shows it can further improve speedup for irregular computation, in some cases up to a 24%, by triggering periodic distribution decisions.
Robert Lyerly, Carlos Bilbao, Changwoo Min, Christopher J. Rossbach, Binoy Ravindran
ACM Trans. Comput. Syst.1
2020 Dynamic and Secure Memory Transformation in Userspace
Robert Lyerly, Xiaoguang Wang 0003, Binoy Ravindran
ESORICS (1)1
2020 DeX: Scaling Applications Beyond Machine Boundaries
abstract
Increasing the computing performance within a single-machine form factor is becoming increasingly difficult due to the complexities in scaling processor interconnects and coherence protocols. On the other hand, converting existing applications to run on multiple nodes requires a significant effort to rewrite application logic in distributed programming models and adapt the code to the underlying network characteristics.This paper presents DeX, an operating system-level approach to extend the execution boundary of existing applications over multiple machines. DeX allows the threads in a process to be relocated and distributed dynamically through a simple function call. DeX makes it trivial for developers to convert any application to be distributed over multiple nodes and for applications to transparently utilize disaggregated resources in a rack-scale system with minimal effort. Evaluation results using a running prototype and eight real applications showed promising results - six out of the eight scaled beyond the single-machine performance on DeX.
Sang-Hoon Kim, Ho-Ren Chuang, Robert Lyerly, Pierre Olivier, Changwoo Min, Binoy Ravindran
ICDCS3
2020 An OpenMP Runtime for Transparent Work Sharing Across Cache-Incoherent Heterogeneous Nodes
abstract
In this work we present libHetMP, an OpenMP runtime for automatically and transparently distributing parallel computation across heterogeneous nodes. libHetMP targets platforms comprising CPUs with different instruction set architectures (ISA) coupled by a high-speed memory interconnect, where cross-ISA binary incompatibility and non-coherent caches require application data be marshaled to be shared across CPUs. Because of this, work distribution decisions must take into account both relative compute performance of asymmetric CPUs and communication overheads. libHetMP drives workload distribution decisions without programmer intervention by measuring performance characteristics during cross-node execution. A novel HetProbe loop iteration scheduler decides if cross-node execution is beneficial, and either distributes work according to the relative performance of CPUs when it is, or places all work on the set of homogeneous CPUs providing the best performance when it is not. We evaluate libHetMP using compute kernels from several OpenMP benchmark suites and show a geometric mean 41% speedup in execution time across asymmetric CPUs.
Robert Lyerly, Changwoo Min, Christopher J. Rossbach, Binoy Ravindran
Middleware1
2020 A Framework for Software Diversification with ISA Heterogeneity
Xiaoguang Wang 0003, Sengming Yeoh, Robert Lyerly, Pierre Olivier, Sang-Hoon Kim, Binoy Ravindran
RAID3
2020 Scaling Shared Memory Multiprocessing Applications in Non-cache-coherent Domains
abstract
Due to the slowdown of Moore's Law, systems designers have begun integrating non-cache-coherent heterogeneous computing elements in order to continue scaling performance. Programming such systems has traditionally been difficult - developers were forced to use programming models that exposed multiple memory regions, requiring developers to manually maintain memory consistency. Previous works proposed distributed shared memory (DSM) as a way to achieve high programmability in such systems. However, past DSM systems were plagued by low-bandwidth networking and utilized complex memory consistency protocols, which limited their adoption. Recently, new networking technologies have begun to change the assumptions about which components are bottlenecks in the system. Additionally, many popular shared-memory programming models utilize memory consistency semantics similar to those proposed for DSM, leading to widespread adoption in mainstream programming.
Ho-Ren Chuang, Robert Lyerly, Stefan Lankes, Binoy Ravindran
SYSTOR2
2019 HEXO: Offloading HPC Compute-Intensive Workloads on Low-Cost, Low-Power Embedded Systems
abstract
OS-capable embedded systems exhibiting a very low power consumption are available at an extremely low price point. It makes them highly compelling in a datacenter context. In this paper we show that sharing long-running, compute-intensive datacenter HPC workloads between a server machine and one or a few connected embedded boards of negligible cost and power consumption can bring significant benefits in terms of consolidation. Our approach, named Heterogeneous EXecution Offloading (HEXO), selectively offloads Virtual Machines (VMs) from server class machines to embedded boards. Our design tackles several challenges. We address the Instruction Set Architecture (ISA) difference between typical servers (x86) and embedded systems (ARM) through hypervisor and guest OS-level support for heterogeneous-ISA runtime VM migration. We cope with the low amount of resources in embedded systems by using lightweight VMs: unikernels. VMs are offloaded based on an estimation of the slowdown expected from running on a given board. We build a prototype of HEXO and demonstrate significant increase in throughput (up to 67%) and energy efficiency (up to 56%) over a set of macro-benchmarks running datacenter compute-intensive jobs.
Pierre Olivier, A. K. M. Fazla Mehrab, Stefan Lankes, Mohamed Lamine Karaoui, Robert Lyerly, Binoy Ravindran
HPDC5
2019 Scheduling HPC workloads on heterogeneous-ISA architectures: poster
abstract
In this paper, we investigate the effectiveness of multiprocessor architectures with ISA-different cores for executing HPC workloads. Our envisioned design point in the heterogeneous architecture space is one with multiple cache-coherency domains, with each domain hosting cores of a different ISA and no coherency between domains. We prototype such an architecture using an Intel Xeon x86-64 server and a Cavium ThunderX ARMv8 server, interconnected using a high-speed network fabric. We design, implement, and evaluate policies for scheduling HPC applications with the goal of maximizing workload makespan. Our results reveal that such an architecture is most effective for workloads that exhibit diverse execution times on ISA-different CPUs, with gains exceeding 60% over ISA-homogeneous architectures. Furthermore, cross-ISA execution migration can yield gains up to 38%.
Mohamed Lamine Karaoui, Anthony Carno, Robert Lyerly, Sang-Hoon Kim, Pierre Olivier, Changwoo Min, Binoy Ravindran
PPoPP3
2019 Cross-ISA execution of SIMD regions for improved performance
abstract
We investigate the effectiveness of executing SIMD workloads on multiprocessors with heterogeneous Instruction Set Architecture (ISA) cores. Heterogeneous ISAs offer an intriguing clock speed/parallelism tradeoff for workloads with frequent usage of SIMD instructions. We consider dynamic migration of SIMD and non-SIMD workloads across ISA-different cores to exploit this trade-off. We present the necessary modifications for a general compiler/run-time infrastructure to transform the dynamic program state of SIMD regions at run-time from one ISA format to another for cross-ISA migration and execution. Additionally, we present a SIMD-aware scheduling policy that makes cross-ISA migration decisions that improve system throughput. We prototype a heterogeneous-ISA system using an Intel Xeon x86-64 server and a Cavium ThunderX ARMv8 server and evaluate the effectiveness of our infrastructure and scheduling policy. Our results reveal that cross-ISA execution migration within SIMD regions can yield throughput gains up to 36% compared to traditional homogeneous ISA systems.
Yihan Pang, Robert Lyerly, Binoy Ravindran
SYSTOR2
2018 AIRA: A Framework for Flexible Compute Kernel Execution in Heterogeneous Platforms
abstract
Heterogeneous-ISA computing platforms have become ubiquitous, and will be used for diverse workloads which render static mappings of computation to processors inadequate. Dynamic mappings which adjust an application's usage in consideration of platform workload can reduce application latency and increase throughput for heterogeneous platforms. We introduce AIRA, a compiler and runtime for flexible execution of applications in CPU-GPU platforms. Using AIRA, we demonstrate up to a 3.78× speedup in benchmarks from Rodinia and Parboil, run with various workloads on a server-class platform. Additionally, AIRA is able to extract up to an 87 percent increase in platform throughput over a static mapping.
Robert Lyerly, Alastair Murray, Antonio Barbalace, Binoy Ravindran
IEEE Trans. Parallel Distributed Syst.1
2017 Breaking the Boundaries in Heterogeneous-ISA Datacenters
abstract
Energy efficiency is one of the most important design considerations in running modern datacenters. Datacenter operating systems rely on software techniques such as execution migration to achieve energy efficiency across pools of machines. Execution migration is possible in datacenters today because they consist mainly of homogeneous-ISA machines. However, recent market trends indicate that alternate ISAs such as ARM and PowerPC are pushing into the datacenter, meaning current execution migration techniques are no longer applicable. How can execution migration be applied in future heterogeneous-ISA datacenters?
Antonio Barbalace, Robert Lyerly, Christopher Jelesnianski, Anthony Carno, Ho-Ren Chuang, Vincent Legout, Binoy Ravindran
ASPLOS2