The significance of Temporal Knowledge Graphs (TKGs) in Artificial Intelligence (AI) lies in their capacity to incorporate time-dimensional information, support complex reasoning and prediction, optimize decision-making processes, enhance the accuracy of recommendation systems, promote multimodal data integration, and strengthen knowledge management and updates. This provides a robust foundation for various AI applications. To effectively learn and apply both static and dynamic temporal patterns for reasoning, a range of embedding methods and large language models (LLMs) have been proposed in the literature. However, these methods often rely on a single underlying embedding space, whose geometric properties severely limit their ability to model intricate temporal patterns, such as hierarchical and ring structures. To address this limitation, this paper proposes embedding TKGs into projective geometric space and leverages LLMs technology to extract crucial temporal node information, thereby constructing the 5EL model. By embedding TKGs into projective geometric space and utilizing Möbius Group transformations, we effectively model various temporal patterns. Subsequently, LLMs technology is employed to process the trained TKGs. We adopt a parameter-efficient fine-tuning strategy to align LLMs with specific task requirements, thereby enhancing the model's ability to recognize structural information of key nodes in historical chains and enriching the representation of central entities. Experimental results on five advanced TKG datasets demonstrate that our proposed 5EL model significantly outperforms existing models.

One-shot neural architecture search (NAS) has achieved impressive results in the field of synthetic aperture radar (SAR) ship detection. However, it is a challenge to balance resource consumption and search speed. To address this issue, we propose a zero-shot NAS method for searching the backbone of SAR ship detection model, named as ZeroSARNas, which is implemented via a multi-characterization proxy and an integer linear programming (ILP) search algorithm. Specifically, we first design the multi-characterization proxy for network capacity prediction, which takes advantage of information entropy and local intrinsic dimensionality (LID) of feature maps, named as ELID proxy, to obtain a more comprehensive understanding of each candidate module in the search space. We then formulate the NAS problem as a ‘0–1’ ILP problem which maximizes the ELID value under the different constraints such as parameters to quickly identify the optimal network. The experimental results show that the detection accuracy of the networks found by ZeroSARNas on the SSDD, HRSID, and LS-SSDD-v1.0 datasets can reach 98.59%, 91.30%, and 75.11% in mean average precision (mAP) with only 1.23 M, 1.75 M, and 1.29 M parameters, respectively. The proposed method reduces the search time from several GPU days or hours to 10.0 seconds, achieving competitive search efficiency.

As the feature size of FPGA shrinks to nanometers, SRAM-based FPGAs are more vulnerable to soft errors. During logic synthesis, reliability of the design can be improved by introducing logic masking effect. In this work, we observe that there are a lot of not-fully occupied look-up tables (LUTs) after logic synthesis. Hence, we propose a functional equivalent class based soft error mitigation scheme to exploit free LUT entries in the circuit. The proposed technique replaces not fully-occupied LUTs with corresponding functional equivalent classes, which can improve the reliability while preserve the functionality of the design. Experimental results show that, compared with the baseline ABC mapper, the proposed technique can reduce the soft error rate by 21%, and the critical-path delay increase is only 4.25%.