Vivek V. Shende

dblp:61/1544 · DBLP profile ↗
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6ranked-venue papers
5as first author
0since 2021 · last 2006
0000-0002-6728-7494ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 5 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Emerging computing paradigms · 55% Electronic design automation · 45%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.122006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Synthesis of reversible logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2003
Emerging computing paradigms › quantum computer architecture
quantum circuit synthesis
0.112006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Emerging computing paradigms
quantum computer architecture
0.112006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Electronic design automation › logic synthesis › non-conventional logic synthesis
reversible logic synthesis
0.012003
Synthesis of reversible logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2003
Emerging computing paradigms
quantum computing
0.022006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Synthesis of reversible logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2003
Emerging computing paradigms › quantum computer architecture › quantum circuit optimization
quantum gate optimization
0.012006
Synthesis of quantum-logic circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006

Methods — techniques the papers use, named apart from their topics

shannon decomposition · 0.1quantum multiplexor · 0.1nearest-neighbor gate mapping · 0.1optimal circuit synthesis · 0.0canonical circuit decomposition · 0.0
YearPublicationVenuePosition
2006 Data structures and algorithms for simplifying reversible circuits
abstract
Reversible logic is motivated by low-power design, quantum circuits, and nanotechnology. We develop a compact representation of small reversible circuits to generate and store optimal circuits for all 40,320 three-input reversible functions, and millions of four-input circuits. This allows implementing a function optimally in constant time for use in the peephole optimization of larger circuits produced by existing techniques, and guarantees that every three-bit subcircuit is optimal. To generate subcircuits, we use a graph-based data structure and algorithms for circuit restructuring. Finally, we demonstrate a suboptimal circuit for which peephole optimization fails.
Aditya K. Prasad, Vivek V. Shende, Igor L. Markov, John P. Hayes, Ketan N. Patel
ACM J. Emerg. Technol. Comput. Syst.2
2006 Synthesis of quantum-logic circuits
abstract
The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits (Proc. R. Soc. Lond. A, Math. Phys. Sci., vol. 425, p. 73, 1989) to the attention of the electronic design automation community (Proc. 40th ACM/IEEE Design Automation Conf., 2003), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 68, p. 012318, 2003), (Proc. 41st Design Automation Conf., 2004), (Proc. 39th Design Automation Conf., 2002), (Proc. Design, Automation, and Test Eur., 2004), (Phys. Rev. A, At. Mol. Opt. Phy., vol. 69, p. 062321, 2004), (IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, p. 710, 2003). Efficient quantum-logic circuits that perform two tasks are discussed: 1) implementing generic quantum computations, and 2) initializing quantum registers. In contrast to conventional computing, the latter task is nontrivial because the state space of an n-qubit register is not finite and contains exponential superpositions of classical bitstrings. The proposed circuits are asymptotically optimal for respective tasks and improve earlier published results by at least a factor of 2. The circuits for generic quantum computation constructed by the algorithms are the most efficient known today in terms of the number of most expensive gates [quantum controlled-NOTs (CNOTs)]. They are based on an analog of the Shannon decomposition of Boolean functions and a new circuit block, called quantum multiplexor (QMUX), which generalizes several known constructions. A theoretical lower bound implies that the circuits cannot be improved by more than a factor of 2. It is additionally shown how to accommodate the severe architectural limitation of using only nearest neighbor gates, which is representative of current implementation technologies. This increases the number of gates by almost an order of magnitude, but preserves the asymptotic optimality of gate counts.
Vivek V. Shende, Stephen S. Bullock, Igor L. Markov
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2005 Synthesis of quantum logic circuits
abstract
The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits to the attention of the EDA community [10, 17, 4, 16, 9]. We discuss efficient circuits to initialize quantum registers and implement generic quantum computations. Our techniques yield circuits that are twice as small as the best previously published technique. Moreover, a theoretical lower bound shows that our new circuits can be improved by at most a factor of two. Further, the circuits grow by at most a factor of nine under severe architectural restrictions.
Vivek V. Shende, Stephen S. Bullock, Igor L. Markov
ASP-DAC1
2004 Smaller Two-Qubit Circuits for Quantum Communication and Computation
abstract
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to library-less logic synthesis, we consider circuits and gates in terms of the underlying model of quantum computation, and do not assume any particular technology. As increasing the number of qubits can be prohibitively expensive, we assume throughout that no extra qubits are available for temporary storage. Using quantum circuit identities, we improve an earlier lower bound of 17 elementary gates by Bullock and Markov to 18, and their upper bound of 23 elementary gates to 18. We also improve upon the generic circuit with six CNOT gates by Zhang et al. (our circuit uses three), and that by Vidal and Dawson with 11 basic gates (we use 10). We study the performance of our synthesis procedures on two-qubit operators that are useful in quantum algorithms and communication protocols. With additional work, we find small circuits and improve upon previously known circuits in some cases.
Vivek V. Shende, Igor L. Markov, Stephen S. Bullock
DATE1
2003 Synthesis of reversible logic circuits
abstract
Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics, and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We prove constructively that every even permutation can be implemented without temporary storage using NOT, CNOT, and TOFFOLI gates. We describe an algorithm for the synthesis of optimal circuits and study the reversible functions on three wires, reporting the distribution of circuit sizes. We also study canonical circuit decompositions where gates of the same kind are grouped together. Finally, in an application important to quantum computing, we synthesize oracle circuits for Grover's search algorithm, and show a significant improvement over a previously proposed synthesis algorithm.
Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2002 Reversible logic circuit synthesis
abstract
Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We prove constructively that every even permutation can be implemented without temporary storage using NOT, CNOT and TOFFOLI gates. We describe an algorithm for the synthesis of optimal circuits and study the reversible functions on three wires, reporting distributions of circuit sizes. Finally, in an application important to quantum computing, we synthesize oracle circuits for Grover's search algorithm, and show a significant improvement over a previously proposed synthesis algorithm.
Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes
ICCAD1