VLDB 2026 Research / reviewers in the wild / expert
D. L. Tao
dblp:61/5373
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 1997
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 35% Interconnection networks and networks-on-chip · 30% Distributed systems · 15% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › broadcasting
broadcast algorithm |
0.0 | 1 | 1997 | Fault Tolerant Algorithms for Broadcasting on the Star Graph Network · IEEE Trans. Computers 1997 |
Electronic design automation › hardware verification and test
concurrent checking |
0.0 | 1 | 1997 | A Self-Testing Nonincreasing Order Checker · IEEE Trans. Computers 1997 |
Distributed systems › consensus › byzantine broadcast
fault-tolerant broadcast |
0.0 | 1 | 1997 | Fault Tolerant Algorithms for Broadcasting on the Star Graph Network · IEEE Trans. Computers 1997 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1997 | A Self-Testing Nonincreasing Order Checker · IEEE Trans. Computers 1997 |
Hardware reliability and fault tolerance › self-checking circuits
self-testing checkers |
0.0 | 1 | 1997 | A Self-Testing Nonincreasing Order Checker · IEEE Trans. Computers 1997 |
Interconnection networks and networks-on-chip › network topology › cayley graph
star graph |
0.0 | 1 | 1997 | Fault Tolerant Algorithms for Broadcasting on the Star Graph Network · IEEE Trans. Computers 1997 |
Electronic design automation › hardware verification and test › design for testability
built-in self-test |
0.0 | 1 | 1997 | A Self-Testing Nonincreasing Order Checker · IEEE Trans. Computers 1997 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1997 | A Self-Testing Nonincreasing Order Checker · IEEE Trans. Computers 1997 |
Methods — techniques the papers use, named apart from their topics
self-testing checker design · 0.0isomorphism construction · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1997 | Fault Tolerant Algorithms for Broadcasting on the Star Graph NetworkabstractFault tolerant algorithms are presented for broadcasting on the star graph. In our algorithm, fault tolerance is achieved by constructing an isomorphism of the star network, such that the faulty nodes minimally disrupt the message passing sequence. It is shown that, in the presence of r(1/spl les/r/spl les/k-2) faults, at most r extra steps are required by our algorithm to perform a one-to-all broadcasting in the k-star network. Our algorithm has the same time complexity as an optimal broadcasting algorithm, and, since it takes advantage of the hierarchical nature of the star graph network, it can be implemented easily. Our algorithm can also be used to perform all-to-all broadcasting in a faulty star graph. Nai-Wei Lo, Bradley S. Carlson, D. L. Tao |
IEEE Trans. Computers | 3 |
| 1997 | A Self-Testing Nonincreasing Order CheckerabstractIn this paper, we design a new class of self-testing checkers, self-testing nonincreasing order checkers, for the first time. The self-testing nonincreasing order checker is a critical component to design concurrent checking VLSI sorters because it is capable of checking whether an arbitrary long sequence of numbers has been sorted, as well as testing itself during normal system operation. D. L. Tao |
IEEE Trans. Computers | 1 |